Integrated Circuit Failure Analysis: A Guide to Preparation Techniques - Rilegato

Beck, Friedrich

 
9780471974017: Integrated Circuit Failure Analysis: A Guide to Preparation Techniques
Rilegato
ISBN 10: 0471974013 ISBN 13: 9780471974017
Casa editrice: John Wiley & Sons Inc, 1998

Sinossi

Fault analysis of highly-integrated semiconductor circuits has become an indispensable discipline in the optimization of product quality. Integrated Circuit Failure Analysis describes state-of-the-art procedures for exposing suspected failure sites in semiconductor devices. The author adopts a hands-on problem-oriented approach, founded on many years of practical experience, complemented by the explanation of basic theoretical principles. Features include: Advanced methods in device preparation and technical procedures for package inspection and semiconductor reliability. Illustration of chip isolation and step-by-step delayering of chips by wet chemical and modern plasma dry etching techniques. Particular analysis of bipolar and MOS circuits, although techniques are equally relevant to other semiconductors. Advice on the choice of suitable laboratory equipment. Numerous photographs and drawings providing guidance for checking results. Focusing on modern techniques, this practical text will enable both academic and industrial researchers and IC designers to expand the range of analytical and preparative methods at their disposal and to adapt to the needs of new technologies.

Le informazioni nella sezione "Riassunto" possono far riferimento a edizioni diverse di questo titolo.

Informazioni sull?autore

Friedrich Beck is the author of Integrated Circuit Failure Analysis: A Guide to Preparation Techniques, published by Wiley.

Dalla quarta di copertina

Fault analysis of highly-integrated semiconductor circuits has become an indispensable discipline in the optimization of product quality. Integrated Circuit Failure Analysis describes state-of-the-art procedures for exposing suspected failure sites in semiconductor devices. The author adopts a hands-on problem-oriented approach, founded on many years of practical experience, complemented by the explanation of basic theoretical principles. Features include: Advanced methods in device preparation and technical procedures for package inspection and semiconductor reliability. ? Illustration of chip isolation and step-by-step delayering of chips by wet chemical and modern plasma dry etching techniques. ? Particular analysis of bipolar and MOS circuits, although techniques are equally relevant to other semiconductors. ? Advice on the choice of suitable laboratory equipment. ? Numerous photographs and drawings providing guidance for checking results. Focusing on modern techniques, this practical text will enable both academic and industrial researchers and IC designers to expand the range of analytical and preparative methods at their disposal and to adapt to the needs of new technologies.

Le informazioni nella sezione "Su questo libro" possono far riferimento a edizioni diverse di questo titolo.

Editore
John Wiley & Sons Inc
Data di pubblicazione
1998
Lingua
Inglese
ISBN 10 
0471974013
ISBN 13 
9780471974017
Rilegatura
Copertina rigida
Numero edizione
1
Numero di pagine
173
Contatto del produttore
Wiley VCH Verlag GmbH
info@wiley-vch.de

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