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Historical Economy in Haiti. Limited availability and unreliability of centrally supplied electrical power continue to fuel demand for power generation equipment, including generators, inverters, batteries, etc.
Historical Economy in Hong Kong. Due to growing environmental concerns, best prospects in the coming years will also include all indoor air quality products, energy saving devices (air filters, vacancy sensors), frequency inverters, and sensors for CO and CO2 and soft starters.
Absolute value circuit: Patented by Guoliang Shou, Sunao Takatori and Makoto Yamamoto on August 6, 1993. Abstract: An absolute value circuit for analog type processing combines an analog inverter circuit and a maximum circuit. The inverter circuit uses an operational amplifier comprised of CMOS inverters which are connected in a cascade with a gain of 1. The maximum circuit includes a pair of nMOS transistors, the source follower outputs of which are connected to a common output.
AC to DC inverter for use with AC synchronous motors: Patented by Robert John Scott on December 7, 2001. Abstract: AC to DC inverters that are formed from electronic switches, such as MOSFETs, that are controlled by gating pulses obtained from comparators. The comparators compare a varying signal against two closely spaced reference voltages so as to provide gating pulses with delays needed to prevent shoot-through in the electronic switches.
Active Common-Mode Compensation for Multi-Phase Inverters: Patented by Grant L. Peters and Arthur J. De Beun Hein on July 28, 1999. Abstract: A system (1) enabling common mode effects in high power inverter arrangements (12) to be compensated using relatively low power electronic components. A sensor (14) detects the common mode effects in leads (11) which connect the inverter (12) to an electric machine (13). This produces a compensation signal which is stepped up and coupled back into the leads by way of a transformer (15). Common mode voltages in the leads may be detected using a substantially resistive network.
Adaptive-load inverters and methods: Patented by Michael Clarence Hopkins on December 7, 1999. Abstract: Inverters are provided which adapt their output impedance to the driven load and thereby enhance inverter performance (e.g., current drive, switching speed and common-mode rejection). An inverter embodiment includes a complementary common-source stage arranged to drive an output port in response to signals at a first side of a differential input port and a complementary common-drain stage arranged to drive the output port in response to signals at a second side of the differential input port.
Analog to digital converter: Patented by Guoliang Shou, Ying Chen and Takashi Tomatsu on May 1, 1998. Abstract: An A/D converter having a plurality of thresholding circuits corresponding to bits of output digital data, each of which includes odd number of inverters serially connected from a first stage to a last stage. The first stage inverter of the thresholding circuits have thresholds equal to a weights of the bits. The inverters of the last stage are of thresholds different from those of the first stage.
Apparatus for reducing current consumption in a CMOS inverter circuit: Patented by Frank Gasparik on September 6, 1994. Abstract: A method and system for reducing pass-through current. The amount of simultaneous current flow through p-channel and n-channel devices of a CMOS inverter is reduced. This results in an increase in the power efficiency of CMOS oscillators, inverters, gates and other CMOS circuits. Another benefit of this invention is the increase of the output signal magnitude. This increase in the output signal with the lower power consumption yields a significantly higher efficiency of the CMOS circuit such as an oscillator.
Asymmetric ram cell: Patented by Samuel D. Naffziger and Donald R. Weiss on February 2, 2000. Abstract: A single-ended read, differential write CMOS SRAM cell has two inverters connected in a regenerative feedback circuit. Each inverter includes two complementary FETs. FETs of the same type in each inverter have differing gate widths and/or drive currents. The cell includes pass gate FETs having gate regions of approximately the same widths but differing lengths.
Balanced truth-and-complement circuit: Patented by Shi-dong Zhou on February 5, 1997. Abstract: A balanced truth-and-complement circuit. A driver circuit which generates a signal and its complement in response to an input signal; a switching circuit selects between the signal and its complement in response to external control signals; and a sense amplifier detects and amplifies the signal selected by the switching circuit. The driver circuit has NMOS transistors and inverters arranged so as to connect either the signal or its complement to the switching circuit.
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Descrizione libro ICON Group International, Inc., 2009. Paperback. Condizione libro: Brand New. 38 pages. 9.00x7.00x0.09 inches. This item is printed on demand. Codice libro della libreria zk0546791875