Memory Performance of Prolog Architectures: 40 - Rilegato

Tick, Evan

 
9780898382549: Memory Performance of Prolog Architectures: 40

Sinossi

This hypothesis is false however - computer languages are not like natural languages where successive generations stick with the language of their ancestors. Computer programmers do not grow more sophisticated - programmers simply take the time to muddle through the increasingly complex language semantics in an attempt to write useful programs.

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Contenuti

1. Introduction.- 1.1. What is Prolog?.- 1.2. Why Prolog?.- 1.2.1. Reduced Instruction Set Architectures.- 1.2.2. Parallel Logic Programming Languages.- 1.2.3. Lisp.- 1.3. Previous Work.- 1.3.1. Architectures.- 1.3.2. Benchmarking.- 1.3.3. Memory Organization.- 1.4. Book Outline.- 2. Prolog Architectures.- 2.1. Canonical Prolog Architectures.- 2.1.1. CIF Data Encoding.- 2.1.2. Naive and Traditional Prolog CIFs.- 2.1.3. Register-Based CIF.- 2.1.4. Other CIF Metrics: Stability.- 2.1.5. Summary.- 2.2. Environment Stacking Architectures.- 2.2.1. DEC-10 Prolog Abstract Machine.- 2.2.2. Warren Abstract Machine.- 2.2.3. Comparison Between Prolog-10 and WAM.- 2.2.4. Lcode Architecture.- 2.3. Restricted AND-Parallel Prolog Architecture.- 2.4. Summary.- 3. Prolog Architecture Measurements.- 3.1. Methodology.- 3.1.1. Compiler.- 3.1.2. Assembler.- 3.1.3. Emulator.- 3.1.4. Simulators.- 3.2. Benchmarks.- 3.3. WAM Referencing Characteristics.- 3.3.1. Data Referencing.- 3.3.2. Instruction Referencing.- 3.4. CIF Referencing Characteristics.- 3.5. PWAM Referencing Characteristics.- 3.6. Summary.- 4. Uniprocessor Memory Organizations.- 4.1. Memory Model.- 4.2. Data Referencing.- 4.2.1. Choice Point Buffer.- 4.2.2. Stack Buffer.- 4.2.3. Environment Stack Buffer.- 4.2.4. Copyback Cache.- 4.2.5. Smart Cache.- 4.2.6. Comparison of Data Memories.- 4.3. Instruction Referencing.- 4.3.1. Instruction Buffer.- 4.3.2. Instruction Caches.- 4.4. Local Memory Configurations.- 4.5. Main Memory Design.- 4.5.1. General Queueing Model.- 4.5.2. Memory Bus Model.- 4.5.3. Copyback I/D Cache System.- 4.5.4. Stack and Instruction Buffer System.- 4.6. Summary.- 5. Multiprocessor Memory Organizations.- 5.1. Memory Model.- 5.2. The Consistency Problem.- 5.2.1. Broadcast Cache Coherency.- 5.2.2. Locking in Broadcast Caches.- 5.2.3. Hybrid Cache Coherency.- 5.3. Coherent Cache Measurements.- 5.4. Shared Memory Design.- 5.4.1. Shared Memory and Bus Queueing Models.- 5.4.2. Measurements.- 5.5. Summary.- 6. Conclusions and Future Research.- 6.1. Conclusions.- 6.2. Future Research.- Appendix A. Glossary of Notation.- Appendix B. Lcode Instruction Set Summary.- Appendix C Local Memory Management Algorithms.- References.

Product Description

Book by Tick Evan

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9781461292029: Memory Performance of Prolog Architectures: 40

Edizione in evidenza

ISBN 10:  1461292026 ISBN 13:  9781461292029
Casa editrice: Springer, 2011
Brossura