This proceedings volume archives the contributions of the speakers who attended the NATO Advanced Research Workshop on Science and Technology of Semiconductor-On-Insulator Structures and Devices Operating in a Harsh Environment held at the Sanatorium Puscha Ozerna, th th Kyiv, Ukraine, from 25 to 29 April 2004. The semiconductor industry has maintained a very rapid growth during the last three decades through impressive technological achievements which have resulted in products with higher performance and lower cost per function. After many years of development semiconductor-on-insulator materials have entered volume production and will increasingly be used by the manufacturing industry. The wider use of semiconductor (especially silicon) on insulator materials will not only enable the benefits of these materials to be further demonstrated but, also, will drive down the cost of substrates which, in turn, will stimulate the development of other novel devices and applications. In itself this trend will encourage the promotion of the skills and ideas generated by researchers in the Former Soviet Union and Eastern Europe and their incorporation in future collaborations.
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Part I: Technology and Economics. High temperature electronics – cluster effects; C. Johnston and A. Crossley. On the evolution of SOI materials and devices; J.P. Colinge.SOI Technology as a basis for microphotonic-microelectronic integrated devices; M.Yu. Barabanenkov et al. Part II: SOI Material Technologies. Smart Cut Technology: the path for advanced SOI substrates; H. Moriceau et al. Porous silicon based SOI: history and prospects; V. Bondarenko et al. Achievement of SiGe-on-insulator technology; Y. Ishikawaet al. CVD diamond substrates for SOI technologies; V. Ralchenko et al. Radical-beam quasiepitaxy technology for fabrication of wide-band gap semiconductors on insulator; G. Natsvlishvili et al. Impact of hydrostatic pressure during annealing of Si:O on creation of SIMOX-like structures; A. Misiuk et al. SiO2 and Si3N4 phase formation by ion implantation with in-situ ultrasound treatment; O. Martinyuk et al. Fabrication and characterisation of Silicon On Insulator substrates incorporating thermal vias; M.F. Bain et al.Part III: Reliability and Operation of SOI Devices in Harsh Environment. Reliability and electrical fluctuations in advanced SOI CMOS devices; J. Jomaah and F. Balestra. Hydrogen and high-temperature charge instability of SOI structures and MOSFETs; A. Nazarov. Recent advances in SOI MOSFET devices and circuits for ultra-low power / high temperature applications; D. Levacq et al. Silicon-on-insulator circuits for application at high temperatures; V. Nakov. High-voltage SOI devices for automotive applications; J. Olsson. Heat generation analysis in SOI LDMOS power transistors; J. Roig et al. Novel SOI MOSFET structure for operation over a wide range of temperatures; V.Ya. Uritsky. MOSFETs scaling down: advantages and disadvantages for high temperature applications; V. Kilchytska et al. Temperature dependence of RF losses in HR SOI substrates; D. Lederer and J.-P. Raskin. Part IV: Radiation Effects.Review ofradiation effects in single- and multiple-gate SOI MOSFETs; S. Cristoloveanu. Radiation effects in SOI: Irradiation by high energy ions and electrons; I. Antonova et al.Radiation characteristics of the short p-channel MOSFETs on SOI substrates ; A. Evtukh et al.Total dose behavior of partially depleted DeleCut SOI MOSFETs; O.V. Naumova et al. Radiation effect on electrical properties of fully-depleted UNIBOND SOI MOSFETs ; Y. Houk et al.Part V : Characterization and Simulation of SOI Devices Operating under Harsh Environment. Low cost high temperature test system for SOI devices; G. Russell et al. Characterization of carrier generation in thin-film SOI devices by reverse gated-diode technique and its application at high temperatures; T.E. Rudenko et al. Back-gate induced noise overshoot in partially-depleted SOI MOSFETs; N. Lukyanchikova et al.Part VI: Novel SOI Devices and Sensors Operating at Harsh Conditions. SiGe heterojunction bipolar transistors on insulating substrates; S. Hall et al. Silicon-on-Insulator substrates with buried ground planes; M. Bain et al. High-voltage high-current DMOS transistor compatible with high-temperature thin-film SOI CMOS applications; P. Godignon et al. A novel low leakage EEPROM cell for application in an extended temperature range (-40 °C up to 225 °C); S. G. M. Richter et al.. Design, fabrication and characterization of SOI pixel detectors of ionizing radiation; D. Tomashevski et al. Polysilicon-on-insulator layers at cryogenic temperatures and high magnetic fields; A.A. Druzhinin et al. Planar photomagnetic effect SOI sensors for various applications with low detection limit; V.N. Dobrovolsky and V. Rossokhaty. Theoretical limit for the SiO2 thickness in silicon MOS devices; B. Majkusiak, J. Walczak. Compact model of the nanoscale gate-all-around MOSFET; D. Jiménez. Self-assembled semiconductor nanowires on silicon and insulating substrates: Experimental behavior; T. Kamins, S.
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