Articoli correlati a Computer Architecture Techniques for Power-Efficiency

Computer Architecture Techniques for Power-Efficiency - Brossura

 
9783031005930: Computer Architecture Techniques for Power-Efficiency

Sinossi

In the last few years, power dissipation has become an important design constraint, on par with performance, in the design of new computer systems. Whereas in the past, the primary job of the computer architect was to translate improvements in operating frequency and transistor count into performance, now power efficiency must be taken into account at every step of the design process. While for some time, architects have been successful in delivering 40% to 50% annual improvement in processor performance, costs that were previously brushed aside eventually caught up. The most critical of these costs is the inexorable increase in power dissipation and power density in processors. Power dissipation issues have catalyzed new topic areas in computer architecture, resulting in a substantial body of work on more power-efficient architectures. Power dissipation coupled with diminishing performance gains, was also the main cause for the switch from single-core to multi-core architectures and aslowdown in frequency increase. This book aims to document some of the most important architectural techniques that were invented, proposed, and applied to reduce both dynamic power and static power dissipation in processors and memory hierarchies. A significant number of techniques have been proposed for a wide range of situations and this book synthesizes those techniques by focusing on their common characteristics. Table of Contents: Introduction / Modeling, Simulation, and Measurement / Using Voltage and Frequency Adjustments to Manage Dynamic Power / Optimizing Capacitance and Switching Activity to Reduce Dynamic Power / Managing Static (Leakage) Power / Conclusions

Le informazioni nella sezione "Riassunto" possono far riferimento a edizioni diverse di questo titolo.

Informazioni sull?autore

Stefanos Kaxiras is a full professor at Uppsala University, Sweden. He holds a Ph.D. degree in Computer Science from the University of Wisconsin. In 1998, he joined the Computing Sciences Center at Bell Labs (Lucent) and later Agere Systems. In 2003 he joined the faculty of the ECE Department of the University of Patras, Greece and in 2010 became a full professor at Uppsala University, Sweden. Kaxiras' research interests are in the areas of memory systems, and multiprocessor/multicore systems, with a focus on power efficiency. He has co-authored more than 100 research papers and 13 US patents, participated in five major European research projects, and currently receives funding from Sweden’s business incubator and innovation agency VINNOVA. Kaxiras is a Distinguished ACM Scientist and IEEE member.Margaret Martonosi is the Hugh Trumbull Adams '35 Professor of Computer Science at Princeton University, where she has been on the faculty since 1994. She also holds an affiliated faculty appointment in Princeton EE. Martonosi's research interests are in computer architecture and mobile computing, with particular focus on power-efficient systems. Her work has included the development of the Wattch power modeling tool and the Princeton ZebraNet mobile sensor network project for the design and real-world deployment of zebra tracking collars in Kenya. Her current research focuses on hardware-software interface approaches to manage heterogeneous parallelism and power-performance tradeoffs in systems ranging from smartphones to chip multiprocessors to large-scale data centers. Martonosi is a Fellow of both IEEE and ACM. She was the 2013 recipient of the Anita Borg Institute Technical Leadership Award. She has also received the 2013 NCWIT Undergraduate Research Mentoring Award and the 2010 Princeton University Graduate Mentoring Award. In addition to many archival publications, Martonosi is an inventor on six granted US patents, and has co-authored a technical reference book on power-aware computer architecture. She serves on the Board of Directors of the Computing Research Association (CRA). Martonosi completed her Ph.D. at Stanford University, and also holds a Master's degree from Stanford and a bachelor's degree from Cornell University, all in Electrical Engineering.

Le informazioni nella sezione "Su questo libro" possono far riferimento a edizioni diverse di questo titolo.

  • EditoreSpringer
  • Data di pubblicazione2008
  • ISBN 10 3031005937
  • ISBN 13 9783031005930
  • RilegaturaCopertina flessibile
  • LinguaInglese
  • Numero edizione1
  • Numero di pagine220
  • Contatto del produttorenon disponibile

EUR 9,70 per la spedizione da Germania a Italia

Destinazione, tempi e costi

Altre edizioni note dello stesso titolo

9781598292084: Computer Architecture Techniques for Power-Efficiency

Edizione in evidenza

ISBN 10:  1598292080 ISBN 13:  9781598292084
Casa editrice: Morgan and Claypool Publishers, 2008
Brossura

Risultati della ricerca per Computer Architecture Techniques for Power-Efficiency

Immagini fornite dal venditore

Kaxiras, Stefanos|Martonosi, Margaret
ISBN 10: 3031005937 ISBN 13: 9783031005930
Nuovo Brossura
Print on Demand

Da: moluna, Greven, Germania

Valutazione del venditore 5 su 5 stelle 5 stelle, Maggiori informazioni sulle valutazioni dei venditori

Condizione: New. Dieser Artikel ist ein Print on Demand Artikel und wird nach Ihrer Bestellung fuer Sie gedruckt. In the last few years, power dissipation has become an important design constraint, on par with performance, in the design of new computer systems. Whereas in the past, the primary job of the computer architect was to translate improvements in operating fre. Codice articolo 608129012

Contatta il venditore

Compra nuovo

EUR 34,41
Convertire valuta
Spese di spedizione: EUR 9,70
Da: Germania a: Italia
Destinazione, tempi e costi

Quantità: Più di 20 disponibili

Aggiungi al carrello

Immagini fornite dal venditore

Margaret Martonosi
ISBN 10: 3031005937 ISBN 13: 9783031005930
Nuovo Taschenbuch
Print on Demand

Da: BuchWeltWeit Ludwig Meier e.K., Bergisch Gladbach, Germania

Valutazione del venditore 5 su 5 stelle 5 stelle, Maggiori informazioni sulle valutazioni dei venditori

Taschenbuch. Condizione: Neu. This item is printed on demand - it takes 3-4 days longer - Neuware -In the last few years, power dissipation has become an important design constraint, on par with performance, in the design of new computer systems. Whereas in the past, the primary job of the computer architect was to translate improvements in operating frequency and transistor count into performance, now power efficiency must be taken into account at every step of the design process. While for some time, architects have been successful in delivering 40% to 50% annual improvement in processor performance, costs that were previously brushed aside eventually caught up. The most critical of these costs is the inexorable increase in power dissipation and power density in processors. Power dissipation issues have catalyzed new topic areas in computer architecture, resulting in a substantial body of work on more power-efficient architectures. Power dissipation coupled with diminishing performance gains, was also the main cause for the switch from single-core to multi-core architectures and a slowdown in frequency increase. This book aims to document some of the most important architectural techniques that were invented, proposed, and applied to reduce both dynamic power and static power dissipation in processors and memory hierarchies. A significant number of techniques have been proposed for a wide range of situations and this book synthesizes those techniques by focusing on their common characteristics. Table of Contents: Introduction / Modeling, Simulation, and Measurement / Using Voltage and Frequency Adjustments to Manage Dynamic Power / Optimizing Capacitance and Switching Activity to Reduce Dynamic Power / Managing Static (Leakage) Power / Conclusions 220 pp. Englisch. Codice articolo 9783031005930

Contatta il venditore

Compra nuovo

EUR 37,44
Convertire valuta
Spese di spedizione: EUR 11,00
Da: Germania a: Italia
Destinazione, tempi e costi

Quantità: 2 disponibili

Aggiungi al carrello

Foto dell'editore

Kaxiras, Stefanos; Martonosi, Margaret
Editore: Springer, 2008
ISBN 10: 3031005937 ISBN 13: 9783031005930
Nuovo Brossura

Da: California Books, Miami, FL, U.S.A.

Valutazione del venditore 5 su 5 stelle 5 stelle, Maggiori informazioni sulle valutazioni dei venditori

Condizione: New. Codice articolo I-9783031005930

Contatta il venditore

Compra nuovo

EUR 43,27
Convertire valuta
Spese di spedizione: EUR 7,88
Da: U.S.A. a: Italia
Destinazione, tempi e costi

Quantità: Più di 20 disponibili

Aggiungi al carrello

Immagini fornite dal venditore

Kaxiras, Stefanos
Editore: Springer 6/25/2008, 2008
ISBN 10: 3031005937 ISBN 13: 9783031005930
Nuovo Paperback or Softback

Da: BargainBookStores, Grand Rapids, MI, U.S.A.

Valutazione del venditore 5 su 5 stelle 5 stelle, Maggiori informazioni sulle valutazioni dei venditori

Paperback or Softback. Condizione: New. Computer Architecture Techniques for Power-Efficiency 0.85. Book. Codice articolo BBS-9783031005930

Contatta il venditore

Compra nuovo

EUR 40,27
Convertire valuta
Spese di spedizione: EUR 11,81
Da: U.S.A. a: Italia
Destinazione, tempi e costi

Quantità: 5 disponibili

Aggiungi al carrello

Immagini fornite dal venditore

Margaret Martonosi
ISBN 10: 3031005937 ISBN 13: 9783031005930
Nuovo Taschenbuch

Da: AHA-BUCH GmbH, Einbeck, Germania

Valutazione del venditore 5 su 5 stelle 5 stelle, Maggiori informazioni sulle valutazioni dei venditori

Taschenbuch. Condizione: Neu. Druck auf Anfrage Neuware - Printed after ordering - In the last few years, power dissipation has become an important design constraint, on par with performance, in the design of new computer systems. Whereas in the past, the primary job of the computer architect was to translate improvements in operating frequency and transistor count into performance, now power efficiency must be taken into account at every step of the design process. While for some time, architects have been successful in delivering 40% to 50% annual improvement in processor performance, costs that were previously brushed aside eventually caught up. The most critical of these costs is the inexorable increase in power dissipation and power density in processors. Power dissipation issues have catalyzed new topic areas in computer architecture, resulting in a substantial body of work on more power-efficient architectures. Power dissipation coupled with diminishing performance gains, was also the main cause for the switch from single-core to multi-core architectures and aslowdown in frequency increase. This book aims to document some of the most important architectural techniques that were invented, proposed, and applied to reduce both dynamic power and static power dissipation in processors and memory hierarchies. A significant number of techniques have been proposed for a wide range of situations and this book synthesizes those techniques by focusing on their common characteristics. Table of Contents: Introduction / Modeling, Simulation, and Measurement / Using Voltage and Frequency Adjustments to Manage Dynamic Power / Optimizing Capacitance and Switching Activity to Reduce Dynamic Power / Managing Static (Leakage) Power / Conclusions. Codice articolo 9783031005930

Contatta il venditore

Compra nuovo

EUR 37,44
Convertire valuta
Spese di spedizione: EUR 14,99
Da: Germania a: Italia
Destinazione, tempi e costi

Quantità: 1 disponibili

Aggiungi al carrello

Immagini fornite dal venditore

Margaret Martonosi
ISBN 10: 3031005937 ISBN 13: 9783031005930
Nuovo Taschenbuch

Da: buchversandmimpf2000, Emtmannsberg, BAYE, Germania

Valutazione del venditore 5 su 5 stelle 5 stelle, Maggiori informazioni sulle valutazioni dei venditori

Taschenbuch. Condizione: Neu. Neuware -In the last few years, power dissipation has become an important design constraint, on par with performance, in the design of new computer systems. Whereas in the past, the primary job of the computer architect was to translate improvements in operating frequency and transistor count into performance, now power efficiency must be taken into account at every step of the design process. While for some time, architects have been successful in delivering 40% to 50% annual improvement in processor performance, costs that were previously brushed aside eventually caught up. The most critical of these costs is the inexorable increase in power dissipation and power density in processors. Power dissipation issues have catalyzed new topic areas in computer architecture, resulting in a substantial body of work on more power-efficient architectures. Power dissipation coupled with diminishing performance gains, was also the main cause for the switch from single-core to multi-core architectures and aslowdown in frequency increase. This book aims to document some of the most important architectural techniques that were invented, proposed, and applied to reduce both dynamic power and static power dissipation in processors and memory hierarchies. A significant number of techniques have been proposed for a wide range of situations and this book synthesizes those techniques by focusing on their common characteristics. Table of Contents: Introduction / Modeling, Simulation, and Measurement / Using Voltage and Frequency Adjustments to Manage Dynamic Power / Optimizing Capacitance and Switching Activity to Reduce Dynamic Power / Managing Static (Leakage) Power / ConclusionsSpringer Verlag GmbH, Tiergartenstr. 17, 69121 Heidelberg 220 pp. Englisch. Codice articolo 9783031005930

Contatta il venditore

Compra nuovo

EUR 37,44
Convertire valuta
Spese di spedizione: EUR 15,00
Da: Germania a: Italia
Destinazione, tempi e costi

Quantità: 2 disponibili

Aggiungi al carrello

Foto dell'editore

Kaxiras, Stefanos; Martonosi, Margaret
Editore: Springer, 2008
ISBN 10: 3031005937 ISBN 13: 9783031005930
Nuovo Brossura

Da: Ria Christie Collections, Uxbridge, Regno Unito

Valutazione del venditore 5 su 5 stelle 5 stelle, Maggiori informazioni sulle valutazioni dei venditori

Condizione: New. In. Codice articolo ria9783031005930_new

Contatta il venditore

Compra nuovo

EUR 43,04
Convertire valuta
Spese di spedizione: EUR 10,66
Da: Regno Unito a: Italia
Destinazione, tempi e costi

Quantità: Più di 20 disponibili

Aggiungi al carrello

Foto dell'editore

Kaxiras, Stefanos
Editore: Springer 2008-06, 2008
ISBN 10: 3031005937 ISBN 13: 9783031005930
Nuovo PF

Da: Chiron Media, Wallingford, Regno Unito

Valutazione del venditore 5 su 5 stelle 5 stelle, Maggiori informazioni sulle valutazioni dei venditori

PF. Condizione: New. Codice articolo 6666-IUK-9783031005930

Contatta il venditore

Compra nuovo

EUR 37,89
Convertire valuta
Spese di spedizione: EUR 23,71
Da: Regno Unito a: Italia
Destinazione, tempi e costi

Quantità: 10 disponibili

Aggiungi al carrello

Foto dell'editore

Kaxiras, Stefanos; Martonosi, Margaret
Editore: Springer, 2008
ISBN 10: 3031005937 ISBN 13: 9783031005930
Nuovo Brossura

Da: Lucky's Textbooks, Dallas, TX, U.S.A.

Valutazione del venditore 5 su 5 stelle 5 stelle, Maggiori informazioni sulle valutazioni dei venditori

Condizione: New. Codice articolo ABLIING23Mar3113020034876

Contatta il venditore

Compra nuovo

EUR 37,81
Convertire valuta
Spese di spedizione: EUR 65,64
Da: U.S.A. a: Italia
Destinazione, tempi e costi

Quantità: Più di 20 disponibili

Aggiungi al carrello