Robust Sigma Delta Converters: And Their Application in Low-Power Highly-Digitized Flexible Receivers - Rilegato

Veldhoven

Rilegato

ISBN 10: 940070643X ISBN 13: 9789400706439

Casa editrice: Springer, 2011

Riassunto

Sigma Delta converters are a very popular choice for the A/D converter in multi-standard, mobile and cellular receivers. Key A/D converter specifications are high dynamic range, robustness, scalability, low-power and low EMI. Robust Sigma Delta Converters presents a requirement derivation of a Sigma Delta modulator applied in a receiver for cellular and connectivity, and shows trade-offs between RF and ADC. The book proposes to categorize these requirements in 5 quality indicators which can be used to qualify a system, namely accuracy, robustness, flexibility, efficiency and emission. In the book these quality indicators are used to categorize Sigma Delta converter theory. A few highlights on each of these quality indicators are;

• Quality indicators: provide a means to quantify system quality.
• Accuracy: introduction of new Sigma Delta Modulator architectures.
• Robustness: a significant extension on clock jitter theory based on phase and error amplitude error models. Extension of the theory describing aliasing in Sigma Delta converters for different types of DACs in the feedback loop.
• Flexibility: introduction of a Sigma Delta converter bandwidth scaling theory leading to very flexible Sigma Delta converters.
• Efficiency: introduction of new Figure-of-Merits which better reflect performance-power trade-offs.
• Emission: analysis of Sigma Delta modulators on emission is not part of the book

The quality indicators also reveal that, to exploit nowadays advanced IC technologies, things should be done as much as possible digital up to a limit where system optimization allows reducing system margins. At the end of the book Sigma Delta converter implementations are shown which are digitized on application-, architecture-, circuit- and layout-level.

Robust Sigma Delta Converters is written under the assumption that the reader has some background in receivers and in A/D conversion.

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L'autore

Robert H.M. van Veldhoven was born in Eindhoven, The Netherlands, in 1972. After finishing his pre-education (HAVO) at ''Het Hertog-Jan College'' in Valkenswaard, he started to study ''hands-on'' electronics at the MTS ''Leonardo Da Vinci college'' in Eindhoven. After 2 years at the MTS, he started studying electrical engineering at the polytechnical college ''Fontys Hogescholen'' in Eindhoven. In 1996 he joined the Mixed-Signal Circuits and Systems group at Philips Research after successfully finishing his graduation project on a low-power Sigma Delta modulator for multi-meter applications. After working 3 years at Philips he started to pursue a master degree in Electronics from the Technical University of Eindhoven, which he successfully finished in 2003. After working for 10 years at Philips Research, he joined the Mixed-Signal Circuits and Systems group at NXP Semiconductor Research in Eindhoven in 2006, where he is an expert in the field of high-resolution A/D and D/A converters, and integrated circuits for instrumentation-, sensor-, audio-, and radio-systems. In 2010 he pursued a PhD degree in Electronic Engineering. Van Veldhoven holds various US patents and published various papers at leading conferences and in leading journals, and is reviewer for several professional journals and conferences. In 2004 and 2010, he was invited to give a forum presentation at the ISSCC about \sd modulators for wireless and cellular receivers.

Arthur H.M. van Roermund (SM’95) was born in Delft, The Netherlands in 1951. He received the M.Sc. degree in electrical engineering in 1975 from the Delft Universi­ty of Technol­ogy and the Ph.D. degree in Applied Sciences from the K.U.Leuven, Belgium, in 1987. From 1975 to 1992 he was with Philips Re­search Laborato­ries in Eindhoven. From 1992 to 1999 he has been a full pro­fessor at the Electrical Engineer­ing Depart­ment of Delft Universi­ty of Technol­ogy, where he was chairman of the Elec­tronics Research Group and member of the management team of DIMES. From 1992 to 1999 he has been chairman of a two-years post-graduate school for “chartered designer”. From 1992 to 1997 he has been consultant for Philips. October 1999 he joined Eindhoven University of Technology as a full professor, chairing the Mixed-signal Microelectronics Group. Since September 2002 he is also director of research of the Department of Electrical Engineering. He is chairman of the board of ProRISC, a nation-wide microelectronics platform; a member of the ICT research platform for the Netherlands (IPN); and a member of the supervisory board of the NRC Photonics research centre. Since 2001, he is one of the three organisers of the yearly workshop on Advanced Analog Circuit Design (AACD). In 2004 he achieved the ‘Simon Stevin Meester’ award, coupled to a price of 500.000€, for his scientific and technological achievements. In 2007 he was member of an international assessment panel for the Department of Electronics and Information of Politecnico di Milano, and in 2009 for Electronics and Electrical Engineering for the merged Aalto University Finland. He authored/co-authored more than 300 articles and 25 books.

Contenuti

List of abbreviations. Terminology. List of symbols. Nomenclature.

1 Introduction. 1.1 Advanced, multi-standard cellular and connectivity terminals for the mass  market. 1.2 Book aims. 1.3 Book scope. 1.4 Original contributions. 1.5 Outline.

2 System quality indicators. 2.1 The system function and its in- and outputs. 2.2 System quality. 2.3 The digital revolution. 2.4 Conclusions.

3 Integrated receiver architectures for cellular and connectivity. 3.1 Wireless receiver architectures for digital Communications. 3.2 Receiver architecture and the quality indicators. 3.3 Conclusions.

4 Specifications for A/D converters in cellular and connectivity receivers. 4.1 IF choice. 4.2 Top-end of the ADC DR. 4.3 Receiver gain. 4.4 Bottom-end of the ADC DR. 4.5 DR of the ADC. 4.6 RF front-end and ADC linearity requirements. 4.7 Example receiver partitioning: receiver for a GSM mobile phone. 4.8 ADC requirements, the system quality indicators and SD modulators as the ADC architecture. 4.9 Conclusions.

5 SD modulator algorithmic accuracy. 5.1 SD modulators with 1-bit quantizer and 1-bit DAC. 5.2 SD modulators with b-bit quantizer and b-bit DAC. 5.3 SD modulators with 1.5-bit quantizer and DAC. 5.4 SD modulators with multiple quantizers and 1-bit DAC. 5.5 SD modulators with additive error-feedback loops. 5.6 Cascaded SD modulators. 5.7 Conclusions.

6 SD modulator robustness. 6.1 Portable, technology robust analog IP and time-to-market. 6.2 Continuous time vs. discrete time loop filter. 6.3 Feed-forward vs. feedback loop filter. 6.4 Gain accuracy. 6.5 Circuit noise of the modulator’s input stage and DAC. 6.6 Non-linearity. 6.7 Aliasing in SD modulators. 6.8 Excess loop delay. 6.9 Clock jitter in CT SD modulators. 6.10 Conclusions.

7 SD modulator flexibility. 7.1 Receiver dictated flexibility requirements. 7.2 SD modulator clock flexibility. 7.3 Input stage and DAC flexibility. 7.4 Loop-filter flexibility. 7.5 Quantizer flexibility. 7.6 Conclusions.

8 SD modulator efficiency. 8.1 Power efficiency FOM: FOMDR. 8.2 Power efficiency FOM: FOMeq,th. 8.3 Distortion FOM: FOMHD3D. 8.4 Area FOM: FOMarea. 8.5 Conclusions.

9 SD modulator implementations and the quality indicators. 9.1 Digitization at system/application level: SD modulators for highly digitized receivers. 9.2 Digitization at analog IP architecture level: a hybrid, inverter based SD modulator. 9.3 Digitization at circuit and layout level: technology portable SD Modulators. 9.4 Implementations judged on the FOMs and quality indicators. 9.5 Conclusions.

10 Conclusions.

A Harmonic and intermodulation distortion in an I&Q system. A.1 Double sided spectrum of second and third order distortion of a complex signal. A.2 Double sided spectrum of second and third order distortion in a complex system.

B Distortion of a differential input transistor pair biased in weak inversion.

C Fourier series expansion and return-to-zero.

D Clock jitter in an I&Q system according to the TPJE clock jitter model.

References. Index.

Dettagli dell?edizione

• Editore: Springer
• Data di pubblicazione: 2011
• ISBN 10: 940070643X
• ISBN 13: 9789400706439
• Rilegatura: Copertina rigida
• Lingua: Inglese
• Numero di pagine: 320