Da: Blindpig Books, Salt lake city, UT, U.S.A.
EUR 52,11
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Aggiungi al carrellohardcover. Condizione: Used - Acceptable. 2014. Some light wear. light marking. book slightly rolled. Very readable copy.
Da: ThriftBooks-Atlanta, AUSTELL, GA, U.S.A.
EUR 55,79
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Aggiungi al carrelloHardcover. Condizione: As New. No Jacket. Pages are clean and are not marred by notes or folds of any kind. ~ ThriftBooks: Read More, Spend Less 1.59.
Da: HPB-Red, Dallas, TX, U.S.A.
EUR 57,73
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Aggiungi al carrellohardcover. Condizione: Good. Connecting readers with great books since 1972! Used textbooks may not include companion materials such as access codes, etc. May have some wear or writing/highlighting. We ship orders daily and Customer Service is our top priority!
Da: GreatBookPrices, Columbia, MD, U.S.A.
EUR 149,16
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Da: GreatBookPrices, Columbia, MD, U.S.A.
EUR 156,12
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Da: Best Price, Torrance, CA, U.S.A.
EUR 154,83
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Da: GreatBookPricesUK, Woodford Green, Regno Unito
EUR 145,05
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Da: GreatBookPricesUK, Woodford Green, Regno Unito
EUR 149,07
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Da: Lucky's Textbooks, Dallas, TX, U.S.A.
EUR 164,11
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Da: Lucky's Textbooks, Dallas, TX, U.S.A.
EUR 164,11
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Da: Ria Christie Collections, Uxbridge, Regno Unito
EUR 157,80
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Da: Ria Christie Collections, Uxbridge, Regno Unito
EUR 170,55
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Aggiungi al carrelloCondizione: New. In.
EUR 191,32
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Aggiungi al carrelloCondizione: New. pp. 392.
Editore: Springer International Publishing, Springer International Publishing, 2018
ISBN 10: 3319808338 ISBN 13: 9783319808338
Lingua: Inglese
Da: AHA-BUCH GmbH, Einbeck, Germania
EUR 160,49
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Aggiungi al carrelloTaschenbuch. Condizione: Neu. Druck auf Anfrage Neuware - Printed after ordering - Thisbook provides a hands-on, application-oriented guide to the language andmethodology of both SystemVerilog Assertions and SystemVerilog FunctionalCoverage. Readers will benefit from the step-by-step approach to functionalhardware verification using SystemVerilog Assertions and Functional Coverage,which will enable them to uncover hidden and hard to find bugs, point directlyto the source of the bug, provide for a clean and easy way to model complextiming checks and objectively answer the question 'have we functionallyverified everything'. Written by a professional end-user of ASIC/SoC/CPU andFPGA design and Verification, this book explains each concept with easy tounderstand examples, simulation logs and applications derived from realprojects. Readers will be empowered to tackle the modeling of complex checkersfor functional verification, thereby drastically reducing their time to designand debug.This updated second edition addresses the latest functional set releasedin IEEE-1800 (2012) LRM, including numerous additional operators and features.Additionally, many of the Concurrent Assertions/Operators explanations areenhanced, with the addition of more examples and figures. Covers in its entirety the latest IEEE-1800 2012 LRM syntax and semantics; Covers both SystemVerilog Assertions and SystemVerilog Functional Coverage language and methodologies; Provides practical examples of the what, how and why of Assertion Based Verification and Functional Coverage methodologies; Explains each concept in a step-by-step fashion and applies it to a practical real life example; Includes 6 practical LABs that enable readers to put in practice the concepts explained in the book.
Da: Books Puddle, New York, NY, U.S.A.
EUR 196,14
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Aggiungi al carrelloCondizione: New. pp. 406.
Editore: Springer New York, Springer New York, 2013
ISBN 10: 1461473233 ISBN 13: 9781461473237
Lingua: Inglese
Da: AHA-BUCH GmbH, Einbeck, Germania
EUR 164,49
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Aggiungi al carrelloBuch. Condizione: Neu. Druck auf Anfrage Neuware - Printed after ordering - This book provides a hands-on, application-oriented guide to the language and methodology of both SystemVerilog Assertions and SytemVerilog Functional Coverage. Readers will benefit from the step-by-step approach to functional hardware verification, which will enable them to uncover hidden and hard to find bugs, point directly to the source of the bug, provide for a clean and easy way to model complex timing checks and objectively answer the question 'have we functionally verified everything'. Written by a professional end-user of both SystemVerilog Assertions and SystemVerilog Functional Coverage, this book explains each concept with easy to understand examples, simulation logs and applications derived from real projects. Readers will be empowered to tackle the modeling of complex checkers for functional verification, thereby drastically reducing their time to design and debug.
Da: California Books, Miami, FL, U.S.A.
EUR 201,73
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EUR 199,29
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Aggiungi al carrelloCondizione: New. pp. 392 52:B&W 6.14 x 9.21in or 234 x 156mm (Royal 8vo) Case Laminate on White w/Gloss Lam.
Da: dsmbooks, Liverpool, Regno Unito
EUR 224,34
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Aggiungi al carrelloHardcover. Condizione: Like New. Like New. book.
Da: Revaluation Books, Exeter, Regno Unito
EUR 244,21
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Aggiungi al carrelloHardcover. Condizione: Brand New. 2014 edition. 234 pages. 9.25x6.25x1.00 inches. In Stock.
Da: Mispah books, Redhill, SURRE, Regno Unito
EUR 233,97
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Aggiungi al carrelloPaperback. Condizione: New. New. book.
Editore: Springer International Publishing Apr 2018, 2018
ISBN 10: 3319808338 ISBN 13: 9783319808338
Lingua: Inglese
Da: BuchWeltWeit Ludwig Meier e.K., Bergisch Gladbach, Germania
EUR 160,49
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Aggiungi al carrelloTaschenbuch. Condizione: Neu. This item is printed on demand - it takes 3-4 days longer - Neuware -Thisbook provides a hands-on, application-oriented guide to the language andmethodology of both SystemVerilog Assertions and SystemVerilog FunctionalCoverage. Readers will benefit from the step-by-step approach to functionalhardware verification using SystemVerilog Assertions and Functional Coverage,which will enable them to uncover hidden and hard to find bugs, point directlyto the source of the bug, provide for a clean and easy way to model complextiming checks and objectively answer the question 'have we functionallyverified everything'. Written by a professional end-user of ASIC/SoC/CPU andFPGA design and Verification, this book explains each concept with easy tounderstand examples, simulation logs and applications derived from realprojects. Readers will be empowered to tackle the modeling of complex checkersfor functional verification, thereby drastically reducing their time to designand debug.This updated second edition addresses the latest functional set releasedin IEEE-1800 (2012) LRM, including numerous additional operators and features.Additionally, many of the Concurrent Assertions/Operators explanations areenhanced, with the addition of more examples and figures. Covers in its entirety the latest IEEE-1800 2012 LRM syntax and semantics; Covers both SystemVerilog Assertions and SystemVerilog Functional Coverage language and methodologies; Provides practical examples of the what, how and why of Assertion Based Verification and Functional Coverage methodologies; Explains each concept in a step-by-step fashion and applies it to a practical real life example; Includes 6 practical LABs that enable readers to put in practice the concepts explained in the book. 444 pp. Englisch.
Editore: Springer New York Aug 2013, 2013
ISBN 10: 1461473233 ISBN 13: 9781461473237
Lingua: Inglese
Da: BuchWeltWeit Ludwig Meier e.K., Bergisch Gladbach, Germania
EUR 160,49
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Aggiungi al carrelloBuch. Condizione: Neu. This item is printed on demand - it takes 3-4 days longer - Neuware -This book provides a hands-on, application-oriented guide to the language and methodology of both SystemVerilog Assertions and SytemVerilog Functional Coverage. Readers will benefit from the step-by-step approach to functional hardware verification, which will enable them to uncover hidden and hard to find bugs, point directly to the source of the bug, provide for a clean and easy way to model complex timing checks and objectively answer the question 'have we functionally verified everything'. Written by a professional end-user of both SystemVerilog Assertions and SystemVerilog Functional Coverage, this book explains each concept with easy to understand examples, simulation logs and applications derived from real projects. Readers will be empowered to tackle the modeling of complex checkers for functional verification, thereby drastically reducing their time to design and debug. 392 pp. Englisch.
Da: moluna, Greven, Germania
EUR 132,75
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Aggiungi al carrelloCondizione: New. Dieser Artikel ist ein Print on Demand Artikel und wird nach Ihrer Bestellung fuer Sie gedruckt. Covers both SystemVerilog Assertions and Sytem Verilog Functional Coverage language and methodologies Provides practical examples of the what, how and why of Assertion Based Verification and Functional Coverage methodologies Explains each c.
Editore: Springer International Publishing, 2018
ISBN 10: 3319808338 ISBN 13: 9783319808338
Lingua: Inglese
Da: moluna, Greven, Germania
EUR 132,75
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Aggiungi al carrelloCondizione: New. Dieser Artikel ist ein Print on Demand Artikel und wird nach Ihrer Bestellung fuer Sie gedruckt. Coversin its entirety the latest IEEE-1800 2012 LRM syntax and semanticsCoversboth SystemVerilog Assertions and SystemVerilog Functional Coverage languageand methodologiesProvidespractical examples of the what, how and why of Assertion Base.
Editore: Springer-Verlag New York Inc., 2013
ISBN 10: 1461473233 ISBN 13: 9781461473237
Lingua: Inglese
Da: THE SAINT BOOKSTORE, Southport, Regno Unito
EUR 182,94
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Aggiungi al carrelloHardback. Condizione: New. This item is printed on demand. New copy - Usually dispatched within 5-9 working days 716.
Da: Majestic Books, Hounslow, Regno Unito
EUR 204,16
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Aggiungi al carrelloCondizione: New. Print on Demand pp. 406.
Da: Biblios, Frankfurt am main, HESSE, Germania
EUR 204,50
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Aggiungi al carrelloCondizione: New. PRINT ON DEMAND pp. 406.
Da: Biblios, Frankfurt am main, HESSE, Germania
EUR 241,20
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Aggiungi al carrelloCondizione: New. PRINT ON DEMAND pp. 392.