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CD-ROM WITH WORKING CODE EXAMPLES, VERIFICATION TOOLS AND MORE
No matter what your current level of expertise, nothing will have you writing and verifying concise, efficient VHDL descriptions of hardware designs as fast – or as painlessly – as this classic tutorial from master teacher Doug Perry. Beginners will find it an invaluable learning tool and experienced pros will keep it on their desk as a trusted reference.
Perry teaches VHDL through a series of hundreds of practical, detailed examples, gradually increasing in complexity until you’re capable of designing a fully functional CPU. The new Fourth Edition has been completely updated with all of the VDHL codes used in the examples changed to reflect today’s faster and more efficient design methods. You’ll also find:
* A CD-ROM containing working code of all of the VDHL examples, with their matching designs along with VITAL verification tools and a working copy of ModelSIM
* All the tools you need for simulation and synthesis
* A listing of the IEEE 1164 STD-LOGIC package used throughout the book
* Useful tables and figures
* Instructions for reading the Bachus-Naur format (BNF) descriptions found in the VHDL Language Reference Manual
There truly is no faster or smarter way to master VHDL than Doug Perry’s “learn by example” approach. It works!
Le informazioni nella sezione "Riassunto" possono far riferimento a edizioni diverse di questo titolo.
Foreword
Preface
Acknowledgments
Chapter 1: Introduction to VHDL
Chapter 2: Behavioral Modeling
Chapter 3: Sequential Processing
Chapter 4: Data Types
Chapter 5: Subprograms and Packages
Chapter 6: Predefined Attributes
Chapter 7: Configurations
Chapter 8: Advanced Topics
Chapter 9: Synthesis
Chapter 10: VHDL Systems
Chapter 11: High Level Design Flow
Chapter 12: Top-Level System Design
Chapter 13: CPU: Synthesis Description
Chapter 14: CPU: RTL Simulation
Chapter 15: CPU Design: Synthesis Results
Chapter 16: Place and Route
Chapter 17: CPU: VITAL Simulation
Chapter 18: At Speed Debugging Techniques
Appendix A: Standard Logic Package
Appendix B: VHDL Reference Tables
Appendix C: Reading VHDL BNF
Appendix D: VHDL93 Updates
Index
About the Author
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