Vhdl: Coding and Logic Synthesis With Synopsys - Rilegato

Lee, Weng Fook

Rilegato

ISBN 10: 0124406513 ISBN 13: 9780124406513

Casa editrice: Academic Pr, 2000

Riassunto

This book provides the most up-to-date coverage using the Synopsys program in the design of integrated circuits. The incorporation of "synthesis tools" is the most popular new method of designing integrated circuits for higher speeds covering smaller surface areas.

Synopsys is the dominant computer-aided circuit design program in the world. All of the major circuit manufacturers and ASIC design firms use Synopsys. In addition, Synopsys is used in teaching and laboratories at over 600 universities.

* First practical guide to using synthesis with Synopsys
* Synopsys is the #1 design program for IC design

Su questo libro

Informazioni sull?autore

Weng Fook Lee is a distinguished principal design engineer at Advanced Micro Devices, Inc. (AMD) and has earned the reputation as a respected synthesis expert. He has vast experience designing ASIC with VHDL. He is an expert at synthesizing circuits tweaked for maximum performance and minimal area utilization, and at developing and implementing new synthesis, verification, and auto place and route design methodology. WF Lee is deeply involved in the design and synthesis of PCI, ISA, and LPC bridges, chipsets, microcontrollers, RISC microprocessors, and state-of-the-art, high-speed, low-power flash memory.

Dalla quarta di copertina

Unlike many other available references, this book is written specifically with practicality in mind. It has over 60 practical examples to help the reader learn how very high-speed integrated hardware description language (VHDL) coding and synthesis can be performed. Starting from simple VHDL coding, the book progresses to complicated, real-world designs. Synthesis results and tweaks are also shown to help the reader gain more insight into how experienced design engineers can optimize any synthesized design.Apart from these key benefits, this book also contains a full chapter dedicated to showing the reader how a full-scale design project of a pipeline microcontroller can be performed: from architecture definition, instruction set definition, micro-architectural implementation, VHDL coding, and testbench coding, to synthesis optimization.In the second portion of the book, synthesis is explained in detail with examples showing the reader how to use Synopsys® commands to optimize synthesized designs. This portion of the book also shows the reader many different architectural implementations that can be used to obtain the most efficient design that accomplishes both high-speed performance and minimal area utilization.Many figures are provided throughout this book, including waveforms from simulation results of testbenches. Detailed explanations are provided for these waveforms, easing the learning curve for the reader to understand how VHDL code functions.This is a highly practical book for students, engineers, and anyone wishing to learn how to write synthesizable VHDL code and synthesis using Synopsys®.

Dettagli dell'edizione

• Editore: Academic Pr
• Data di pubblicazione: 2000
• Lingua: Inglese
• ISBN 10: 0124406513
• ISBN 13: 9780124406513
• Rilegatura: Copertina rigida
• Numero edizione: 1
• Numero di pagine: 392
• Contatto del produttore: non disponibile
• Persona responsabile: non disponibile