Microprocessors and Interfacing - Brossura

Kumar, N Senthil; Saravanan, M; Jeevananthan, S; Shah, Satish

Brossura

ISBN 10: 0198079060 ISBN 13: 9780198079064

Casa editrice: OUP India, 2012

Riassunto

Microprocessors and Interfacing is a textbook for undergraduate engineering students who study a course on various microprocessors, its interfacing, programming and applications.

The book in eighteen chapters provides a very brief overview of 8085 processors, followed by a detailed discussion of 8086 architecture, programming and interfacing concepts. The book also provides a brief treatment of 8088 processors bringing out its architectural difference in relation to 8086. The thrust of this book is on 8086 processors. Subsequently, the book discusses the 8-bit 8051 and 16-bit 8096 microcontrollers. The last chapter on advanced processors briefs on 80186, 80286, 80386, 80486, Pentium, PowerPC, PIC, RISC& CISC, SUN SPARC and ARM microcontrollers.

Providing a balance between theory and practice, the book is interspersed with complete ALP codes, review questions, programming and design based exercises.

Su questo libro

L'autore

Dr N Senthil Kumar is Professor, Department of Electrical& Electronics Engineering, Mepco Schlenk Engineering College, Sivakasi, Tamilnadu. He has more than 20 years of active teaching and research experience. Dr M Saravanan is Professor, Department of Electrical& Electronics Engineering, Thiagarajar College of Engineering, Madurai, Tamilnadu. He has more than 15 years of teaching cum research experience. Dr S Jeevananthan is Asst. Professor, Department of Electrical& Electronics Engineering, Pondicherry Engineering College, Puducherry. He has around a decade of experience in teaching undergraduates and postgraduates. Dr Satish Shah is Professor, Department of Electrical Engineering, The Maharaja Sayajirao University of Baroda, Vadodara.

Contenuti

• Preface
• 1. Microprocessors-Evolution and Introduction
• 1.1 Introduction
• 1.2 Explanation of Basic Terms
• 1.3 Microprocessors and Microcontrollers
• 1.4 Microprocessor-based System
• 1.5 Origin of Microprocessors
• 1.5.1 First generation (1971-1973)
• 1.5.2 Second generation (1974-1978)
• 1.5.3 Third generation (1978-1980)
• 1.5.4 Fourth generation (1981-1995)
• 1.5.5 Fifth generation (1995-till date)
• 1.5.6 Timeline of microprocessor evolution
• 1.6 Classification of Microprocessors
• 1.7 Types of Memory
• 1.8 Input and Output Devices
• 1.9 Technology Improvements Adapted to Microprocessors and Computers
• 1.10 Architecture and signals of 8085
• 1.11 Instruction set of 8085
• 1.12 Memory and I/O interfacing with 8085
• 1.13 Interrupt structure of 8085
• 2. Methods of data transfer and serial transfer protocols
• 2.1 Data Transfer Mechanisms
• 2.2 Memory-mapped and I/O-mapped Data Transfer
• 2.3 Programmed Data Transfer
• 2.4 Direct Memory Access
• 2.5 Parallel Data Transfer
• 2.5.1 PCI bus
• 2.6 Serial Data transfer
• 2.6.1 Introduction to RS-232 standard
• 2.6.2 Introduction to RS-485 standard
• 2.6.3 GPIB/IEEE 488 standards
• 2.6.4 USB
• PART 1: INTEL 8086-16-BIT MICROPROCESSORS
• 3. Intel 8086 Microprocessor architecture, features, and signals
• 3.1 Introduction
• 3.2 Architecture of 8086
• 3.2.1 Execution unit
• 3.2.2 Bus interface unit
• 3.2.3 Differences between 8086 and 8088
• 3.3 Accessing Memory Locations
• 3.4 Pin Details of 8086
• 3.4.1 Function of pins common to minimum and maximum modes
• 3.4.2 Function of pins used in minimum mode
• 3.4.3 Function of pins used in maximum mode
• 4. Addressing modes, instruction set, and Programming of 8086
• 4.1 Addressing Modes in 8086
• 4.1.1 Register addressing mode
• 4.1.2 Immediate addressing mode
• 4.1.3 Data memory addressing modes
• 4.1.4 Program memory addressing modes
• 4.1.5 Stack memory addressing mode
• 4.2 Segment Override Prefix
• 4.3 Instruction Set of 8086
• 4.3.1 Data transfer instructions
• 4.3.2 Arithmetic instructions
• 4.3.3 Logical instructions
• 4.3.4 Flag manipulation instructions
• 4.3.5 Control transfer instructions
• 4.3.6 Shift/rotate instructions
• 4.3.7 String instructions
• 4.3.8 Machine or processor control instructions
• 4.4 8086 Assembly Language Programming
• 4.4.1 Writing 8086 programs using line assembler
• 4.4.2 8086 Assembler directives
• 4.4.3 Writing assembly language programs using MASM
• 4.5 Program Development Process
• 4.6 Modular Programming
• 4.6.1 CALL Instruction:
• 4.6.2 RET instruction
• 4.6.3 MACRO
• 4.6.3.1 Illustrative Example
• 5. 8086 interrupts
• 5.1 Introduction
• 5.2 Interrupt Types in 8086
• 5.3 Processing of Interrupts by 8086
• 5.4 Dedicated Interrupt Types in 8086
• 5.4.1 Type 00H or divide-by-zero interrupts
• 5.4.2 Type 01H, single step, or trap interrupt
• 5.4.3 type 02H or NMI interrupt
• 5.4.4 Type 03H or one-byte INT interrupt
• 5.4.5 type 04H or overflow interrupt
• 5.5 Software Interrupts-Types 00h-FFH
• 5.6 INTR Interrupts-Types 00h-FFH
• 5.7 Priority among 8086 Interrupts
• 5.8 Interrupt Service Routines
• 5.9 Bios Interrupts or Function Calls
• 5.9.1 INT 10H
• 5.9.2 INT 11H
• 5.9.3 INT 12H
• 5.9.4 INT 13H
• 5.9.5 INT 14H
• 5.9.6 INT 15H
• 5.9.7 INT 16H
• 5.9.8 INT 17H
• 5.10. Interrupt Handlers
• 5.11 DOS Services: int 21h
• 5.11.1 Example_1
• 5.11.2 Example_2
• 5.12 System Calls: BIOS Services
• 5.12.1 Print Screen Service: INT 05h
• 5.12.2 Video Services: INT 10h
• 5.12.3 Keyboard Services: int 16h
• 5.12.3.1 Example_1
• 5.12.3.2 Example_2
• 5.12.4 Printer Services: int 17h
• 5.12.4.1 Example_1
• 5.12.4.2 Example_2
• 6. Basic Memory and I/O interfacing with 8086
• 6.1 Physical Memory Organization in 8086
• 6.2 Formation of System Bus
• 6.3 Interfacing RAM and EPROM Chips using only Logic Gates
• 6.4 Interfacing Ram/EPROM Chips using Decoder IC and Logic Gates
• 6.5 I/O Interfacing
• 6.5.1 I/O instructions in 8086
• 6.5.2 I/O-mapped and memory-mapped I/O
• 6.6 Interfacing 8-bit input device with 8086
• 6.6.1 Assigning 8-bit address to 8-bit input device using address decoder having only logic gates
• 6.6.2 Assigning 8-bit address to 8-bit input device using address decoder IC 74LS138
• 6.6.3 Assigning 16-bit address to 8-bit DIP switch using address decoder having only logic gates
• 6.7 Interfacing 8-bit Output Device with 8086
• 6.8 Interfacing 8-bit and 16-bit I/O Devices or Ports with 8086
• 7. Features and interfacing of programmable peripheral devices with 8086
• 7.1 Intel 8255 Programmable Peripheral Interface
• 7.1.1 Features of 8255
• 7.1.2 Block diagram of Intel 8255
• 7.1.3 Operating modes and control words of 8255
• 7.1.4 Configuring examples
• 7.1.5 Other programmable peripheral Interface ICs -8155 and 8755
• 7.2 Interfacing Switches and LEDs
• 7.3 Interfacing Seven-segment Displays
• 7.4 Traffic Light Control
• 7.5 Interfacing Analog-to-digital Converters
• 7.6 Interfacing Digital-to-analog Converters
• 7.6.1 Square wave generation
• 7.6.2 Staircase waveform generation
• 7.6.3 Ramp waveform generation
• 7.6.4 Waveform generation using stored data
• 7.7 Interfacing Stepper Motors
• 7.8 Interfacing Intelligent LCDs
• 7.9 Keyboard and Display Interface IC 8279
• 7.9.1 Matrix keyboard
• 7.9.2 Multiplexed display
• 7.9.3 Features, block diagram, and pin details of 8279
• 7.9.4 Programming of 8279
• 7.9.5 Display interface using 8279
• with 8086
• 7.9.6 Keyboard interface using 8279 with 8086
• 7.10 Intel Timer IC 8253
• 7.10.1 Features of IC 8253
• 7.10.2 Block diagram of IC 8253 and pin details
• 7.10.3 Operating modes and control word of IC 8253
• 7.10.4 Interfacing IC 8253 with 8086
• 7.11 Introduction to Serial Communication
• 7.11.1 Features and details of 8251 USART
• 7.11.2 Control words
• 7.11.3 Interfacing 8251 with 8086
• 7.12 8259 Programmable Interrupt Controller
• 7.12.1 Features and architecture of 8259
• 7.12.2 Pin diagram and details of 8259
• 7.12.3 Initialization of 8259
• 7.12.4 Operation of 8259
• 7.12.5 Interfacing 8259 with 8086
• 7.13 8237 DMA Controller
• 7.13.1 Features, pin details, and architecture of 8237
• 7.13.2 DMA initialization and operation
• 7.13.3 Operation of 8237 with 8086
• 7.14 Interfacing Printer with 8086
• 7.15 Interfacing CRT Terminal with 8086
• 529
• 8. Multiprocessor configuration
• 8.1 Introduction
• 8.2 Multiprocessor System-Need and Advantages
• 8.3 Different Configurations of Multiprocessor System
• 8.3.1 Coprocessor and closely-coupled configurations
• 8.3.2 Loosely-coupled configuration
• 8.4 Bus Arbitration in Loosely-coupled Multiprocessor System
• 8.4.1 Daisy chaining
• 8.4.2 Polling
• 8.4.3 Independent requesting
• 8.5 Interconnection Topologies in a Multiprocessor System
• 8.5.1 Shared bus architecture
• 8.5.2 Multi-port memory
• 8.5.3 Linked input/output
• 8.5.4 Crossbar switching
• 8.6 Physical Interconnections between Processors in a Multiprocessor System
• 8.6.1 Star configuration
• 8.6.2 Ring or loop configuration
• 8.6.3 Completely-connected configuration
• 8.6.4 Regular topology
• 8.6.5 Irregular topology
• 8.7 Operating System Used in a Multiprocessor System
• 8.8 Typical Multiprocessor System having 8086 and 8087
• 8.8.1 Architecture of 8087
• 8.8.2 Pin details of 8087
• 8.8.3 Interconnection of 8087 with 8086
• 8.8.4 Data types of 8087
• 8.9 Typical Multiprocessor System having 8086 and 8089
• 8.9.1 Pin details of 8089
• 8.9.2 Local and remote operation of 8089
• 8.9.3 8089 (IOP) architecture
• 8.9.4 Communication between CPU (8086) and IOP (8089)
• 9. 8086-BASED SYSTEMS
• 9.1 Introduction
• 9.2 8086 in Minimum Mode Configuration
• 9.2.1 Formation of separate address bus and data bus in 8086
• 9.2.2 Formation of buffered address bus and data bus in 8086
• 9.2.3 Connection of 8284A with 8086
• 9.3 8086 in Maximum Mode Configuration
• 9.4 8086 System Bus Timings
• 9.4.1 Timing diagrams for general bus operation in minimum mode
• 9.4.2 Timing diagrams for general bus operation in maximum mode
• 9.4.3 Interrupt acknowledgement (INTA) timing
• 9.4.4 Bus request and bus grant timing
• 9.5 Design of Minimum Mode 8086-based System
• PART 2: INTEL 8051 MICROCONTROLLERS
• 10. Introduction to 8051 Microcontrollers
• 10.1 Introduction
• 10.2 Intel's MCS-51 Series Microcontrollers
• 10.3 Intel 8051 Architecture
• 10.4 Memory Organization
• 10.5 Internal RAM Structure
• 10.5.1 Special function registers
• 10.5.2 Processor status word
• 10.6 Power Control in 8051
• 10.6.1 Idle mode
• 10.6.2 Power down mode
• 10.7 Stack Operation
• 11. 8051 instruction set and programming
• 11.1 Introduction
• 11.2 Addressing Modes of 8051
• 11.2.1 Immediate addressing
• 11.2.2 Register direct addressing
• 11.2.3 Memory direct addressing
• 11.2.4 Memory indirect addressing
• 11.2.5 Indexed addressing
• 11.3 Instruction Set of 8051
• 11.3.1 Data transfer instructions
• 11.3.2 Arithmetic instructions
• 11.3.3 Logical instructions
• 11.3.4 Branching instructions
• 11.3.5 Bit manipulation instructions
• 11.4 Some Assembler Directives
• 11.5 Programming Examples using 8051 Instruction Set
• 12. Hardware features of 8051
• 12.1 Introduction
• 12.2 Parallel Ports in 8051
• 12.2.1 Structure of port 1
• 12.2.2 Structure of ports 0 and 2
• 12.2.3 Structure of port 3
• 12.3 External Memory Interfacing in 8051
• 12.3.1 Program memory interfacing
• 12.3.2 Data memory interfacing
• 12.3.3 Timing diagram for external program and data memory access
• 12.4 8051 Timers
• 12.4.1 Timer SFRs
• 12.4.2 Timer operating modes
• 12.4.3 Timer control and operation
• 12.4.4 Using timers as counters
• 12.4.5 Programming examples
• 12.5 8051 Interrupts
• 12.5.1 Interrupt sources and interrupt vector addresses
• 12.5.2 Enabling and disabling of interrupts
• 12.5.3 Interrupt priorities and polling sequence
• 12.5.4 Timing of interrupts
• 12.5.5 Programming examples
• 12.6 8051 Serial Ports
• 12.6.1 Serial port control Sfrs
• 12.6.2 Operating modes
• 12.6.3 Programming serial port
• 13. Interface examples
• 13.1 Interfacing 8255 with 8051
• 13.2 Interfacing of Push Button Switches and LEDs
• 13.3 Interfacing of Seven-segment Displays
• 13.4 Interfacing ADC Chip
• 13.5 Interfacing DAC Chip
• 13.5.1 Square wave generation
• 13.5.2 Staircase wave generation
• 13.5.3 Ramp wave generation
• 13.5.4 Sine wave generation
• 13.6 Interfacing Matrix Keypad
• 13.7 Interfacing Stepper Motor with 8051
• 13.8 Interfacing LCD with 8051
• 13.9 Interfacing DC Motors/Servomotors
• 13.10 Microcontroller Application Example-Stopwatch
• 13.11 Microcontroller Application Example-Traffic light control
• 13.12 Microcontroller Application Example-Thermometer
• 13.13 RTC Interfacing using I2C Standard
• 13.13.1 Details of I2C bus
• 13.13.2 8051 Subroutines used to implement I2C bus
• 13.13.3 DS1307-Serial I2C real-time clock IC
• 13.14 Washing Machine control
• 13.15 Elevator / Lift interface
• PART 3: INTEL 8096-16-BIT MICROCONTROLLERS
• 14. OVERVIEW OF INTEL 8096 MICROCONTROLLERS
• 14.1 Introduction
• 14.2 Features of Intel 8096 Microcontroller
• 14.3 Functional Block Diagram of Intel 8096 Microcontroller
• 14.3.1 CPU section
• 14.3.2 8096 CPU buses
• 14.3.3 Register arithmetic and logical unit
• 14.3.4 Temporary register
• 14.3.5 Register file
• 14.3.6 Prog...

Dettagli dell?edizione

• Editore: OUP India
• Data di pubblicazione: 2012
• ISBN 10: 0198079060
• ISBN 13: 9780198079064
• Rilegatura: Copertina flessibile
• Lingua: Inglese
• Numero di pagine: 720