Explains how to use low power design in an automated design flow, and examine the design time and performance trade-offs
Includes the latest tools and techniques for low power design applied in an ASIC design flow
Focuses on low power in an automated design methodology, a much neglected area
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This book carefully details design tools and techniques for realizing low power and energy efficiency in a highly productive design methodology.
Important topics include:
- Microarchitectural techniques to reduce energy per operation
- Power reduction with timing slack from pipelining
- Analysis of the benefits of using multiple supply and threshold voltages
- Placement techniques for multiple supply voltages
- Verification for multiple voltage domains
- Improved algorithms for gate sizing, and assignment of supply and threshold voltages
- Power gating design automation to reduce leakage
- Relationships among statistical timing, power analysis, and parametric yield optimization
Design examples illustrate that these techniques can improve energy efficiency by two to three times.
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