Articoli correlati a Power Distribution Network Design for Vlsi

Power Distribution Network Design for Vlsi - Rilegato

Zhu, Qing K.

 
9780471657200: Power Distribution Network Design for Vlsi
Rilegato
ISBN 10: 0471657204 ISBN 13: 9780471657200
Casa editrice: Wiley-Interscience, 2004

Sinossi

A hands-on troubleshooting guide for VLSI network designers
The primary goal in VLSI (very large scale integration) power network design is to provide enough power lines across a chip to reduce voltage drops from the power pads to the center of the chip. Voltage drops caused by the power network's metal lines coupled with transistor switching currents on the chip cause power supply noises that can affect circuit timing and performance, thus providing a constant challenge for designers of high-performance chips.
Power Distribution Network Design for VLSI provides detailed information on this critical component of circuit design and physical integration for high-speed chips. A vital tool for professional engineers (especially those involved in the use of commercial tools), as well as graduate students of engineering, the text explains the design issues, guidelines, and CAD tools for the power distribution of the VLSI chip and package, and provides numerous examples for its effective application.
Features of the text include:
* An introduction to power distribution network design
* Design perspectives, such as power network planning, layout specifications, decoupling capacitance insertion, modeling, and analysis
* Electromigration phenomena
* IR drop analysis methodology
* Commands and user interfaces of the VoltageStorm(TM) CAD tool
* Microprocessor design examples using on-chip power distribution
* Flip-chip and package design issues
* Power network measurement techniques from real silicon
The author includes several case studies and a glossary of key words and basic terms to help readers understand and integrate basic concepts in VLSI design and power distribution.

Le informazioni nella sezione "Riassunto" possono far riferimento a edizioni diverse di questo titolo.

Informazioni sull'autore

QING K. ZHU, PhD, is an instructor at the University of California at Berkeley Extension System. His industry experience includes Intel and Matrix Semiconductor.

Dalla quarta di copertina

A hands-on troubleshooting guide for VLSI network designers

The primary goal in VLSI (very large scale integration) power network design is to provide enough power lines across a chip to reduce voltage drops from the power pads to the center of the chip. Voltage drops caused by the power network’s metal lines coupled with transistor switching currents on the chip cause power supply noises that can affect circuit timing and performance, thus providing a constant challenge for designers of high-performance chips.

Power Distribution Network Design for VLSI provides detailed information on this critical component of circuit design and physical integration for high-speed chips. A vital tool for professional engineers (especially those involved in the use of commercial tools), as well as graduate students of engineering, the text explains the design issues, guidelines, and CAD tools for the power distribution of the VLSI chip and package, and provides numerous examples for its effective application.

Features of the text include:

  • An introduction to power distribution network design
  • Design perspectives, such as power network planning, layout specifications, decoupling capacitance insertion, modeling, and analysis
  • Electromigration phenomena
  • IR drop analysis methodology
  • Commands and user interfaces of the VoltageStorm™ CAD tool
  • Microprocessor design examples using on-chip power distribution
  • Flip-chip and package design issues
  • Power network measurement techniques from real silicon

The author includes several case studies and a glossary of key words and basic terms to help readers understand and integrate basic concepts in VLSI design and power distribution.

Dal risvolto di copertina interno

A hands-on troubleshooting guide for VLSI network designers
 
The primary goal in VLSI (very large scale integration) power network design is to provide enough power lines across a chip to reduce voltage drops from the power pads to the center of the chip. Voltage drops caused by the power network's metal lines coupled with transistor switching currents on the chip cause power supply noises that can affect circuit timing and performance, thus providing a constant challenge for designers of high-performance chips.
 
Power Distribution Network Design for VLSI provides detailed information on this critical component of circuit design and physical integration for high-speed chips. A vital tool for professional engineers (especially those involved in the use of commercial tools), as well as graduate students of engineering, the text explains the design issues, guidelines, and CAD tools for the power distribution of the VLSI chip and package, and provides numerous examples for its effective application.
 
Features of the text include:
* An introduction to power distribution network design
* Design perspectives, such as power network planning, layout specifications, decoupling capacitance insertion, modeling, and analysis
* Electromigration phenomena
* IR drop analysis methodology
* Commands and user interfaces of the VoltageStorm(TM) CAD tool
* Microprocessor design examples using on-chip power distribution
* Flip-chip and package design issues
* Power network measurement techniques from real silicon
 
The author includes several case studies and a glossary of key words and basic terms to help readers understand and integrate basic concepts in VLSI design and power distribution.

Le informazioni nella sezione "Su questo libro" possono far riferimento a edizioni diverse di questo titolo.

Editore
Wiley-Interscience
Data di pubblicazione
2004
Lingua
Inglese
ISBN 10 
0471657204
ISBN 13 
9780471657200
Rilegatura
Copertina rigida
Numero edizione
1
Numero di pagine
230
Contatto del produttore
non disponibile
Persona responsabile
non disponibile