Articoli correlati a Fast Simulation of Computer Architectures
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Chapters in Fast Simulation of Computer Architectures cover topics such as how to collect traces, emulate instruction sets, simulate microprocessors using execution-driven techniques, evaluate memory hierarchies, apply statistical sampling to simulation, and how to augment simulation with performance bound models. The chapters have been written by many of the leading researchers in the area, in a collaboration that ensures that the material is both coherent and cohesive.
Audience: Of tremendous interest to practising computer architect designers seeking timely solutions to tough evaluation problems, and to advanced upper division undergraduate and graduate students of the field. Useful study aids are provided by the problems at the end of Chapters 2 through 8.
Le informazioni nella sezione "Riassunto" possono far riferimento a edizioni diverse di questo titolo.
Contenuti
1. Introduction; T. M. Conte, C. E. Gimarc. 2. SHADE: A Fast Instruction-Set Simulator for Execution Profiling; B. Cmelik, D. Keppel. 3. Instrumentation Tools; J. Pierce et al. 4. Stack-Based Single-Pass Cache Simulation; T. M. Conte. 5. Non-Stack Single-Pass Simulation; R. A. Sugumar, S. G. Abraham. 6. Execution Driven Simulation of Shared Memory Multiprocessors; B. Boothe. 7. Sampling for Cache and Processor Simulation; K. N. Menezes. 8. Performance Bounds for Rapid Computer System Evaluation; B. Mangione-Smith. Index.
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Gebunden. Condizione: New. Dieser Artikel ist ein Print on Demand Artikel und wird nach Ihrer Bestellung fuer Sie gedruckt. Chapters in Fast Simulation of Computer Architectures cover topics such as how to collect traces, emulate instruction sets, simulate microprocessors using execution-driven techniques, evaluate memory hierarchies, apply statistical sampling to si. Codice articolo 5971606
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Condizione: New. Contains chapters which cover topics such as how to collect traces, emulate instruction sets, simulate microprocessors using execution-driven techniques, evaluate memory hierarchies, apply statistical sampling to simulation, and how to augment simulation with performance bound models. Editor(s): Conte, Thomas M.; Gimarc, Charles E. Num Pages: 244 pages, biography. BIC Classification: UYF. Category: (P) Professional & Vocational; (UP) Postgraduate, Research & Scholarly. Dimension: 234 x 156 x 15. Weight in Grams: 542. . 1995. Hardback. . . . . Codice articolo V9780792395935
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Buch. Condizione: Neu. Druck auf Anfrage Neuware - Printed after ordering - Chapters in Fast Simulation of Computer Architectures cover topics such as how to collect traces, emulate instruction sets, simulate microprocessors using execution-driven techniques, evaluate memory hierarchies, apply statistical sampling to simulation, and how to augment simulation with performance bound models. The chapters have been written by many of the leading researchers in the area, in a collaboration that ensures that the material is both coherent and cohesive. Audience: Of tremendous interest to practising computer architect designers seeking timely solutions to tough evaluation problems, and to advanced upper division undergraduate and graduate students of the field. Useful study aids are provided by the problems at the end of Chapters 2 through 8. Codice articolo 9780792395935
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Buch. Condizione: Neu. This item is printed on demand - it takes 3-4 days longer - Neuware -Chapters in Fast Simulation of Computer Architectures cover topics such as how to collect traces, emulate instruction sets, simulate microprocessors using execution-driven techniques, evaluate memory hierarchies, apply statistical sampling to simulation, and how to augment simulation with performance bound models. The chapters have been written by many of the leading researchers in the area, in a collaboration that ensures that the material is both coherent and cohesive. Audience: Of tremendous interest to practising computer architect designers seeking timely solutions to tough evaluation problems, and to advanced upper division undergraduate and graduate students of the field. Useful study aids are provided by the problems at the end of Chapters 2 through 8. 260 pp. Englisch. Codice articolo 9780792395935
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Buch. Condizione: Neu. Fast Simulation of Computer Architectures | Thomas M. Conte (u. a.) | Buch | ix | Englisch | 1995 | Springer | EAN 9780792395935 | Verantwortliche Person für die EU: Springer Verlag GmbH, Tiergartenstr. 17, 69121 Heidelberg, juergen[dot]hartmann[at]springer[dot]com | Anbieter: preigu Print on Demand. Codice articolo 102548862
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Springer, Springer Jun 1995, 1995
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ISBN 13: 9780792395935
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Buch. Condizione: Neu. This item is printed on demand - Print on Demand Titel. Neuware -Chapters in Fast Simulation of Computer Architectures cover topics such as how to collect traces, emulate instruction sets, simulate microprocessors using execution-driven techniques, evaluate memory hierarchies, apply statistical sampling to simulation, and how to augment simulation with performance bound models. The chapters have been written by many of the leading researchers in the area, in a collaboration that ensures that the material is both coherent and cohesive.Audience: Of tremendous interest to practising computer architect designers seeking timely solutions to tough evaluation problems, and to advanced upper division undergraduate and graduate students of the field. Useful study aids are provided by the problems at the end of Chapters 2 through 8.Springer-Verlag KG, Sachsenplatz 4-6, 1201 Wien 260 pp. Englisch. Codice articolo 9780792395935
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