SiP System-in-Package Design and Simulation: Mentor Ee Flow Advanced Design Guide - Rilegato

Li, Suny

Rilegato

ISBN 10: 1119045932 ISBN 13: 9781119045939

Casa editrice: John Wiley & Sons Inc, 2017

Riassunto

An advanced reference documenting, in detail, every step of a real System-in-Package (SiP) design flow

Written by an engineer at the leading edge of SiP design and implementation, this book demonstrates how to design SiPs using Mentor EE Flow. Key topics covered include wire bonding, die stacks, cavity, flip chip and RDL (redistribution layer), Embedded Passive, RF design, concurrent design, Xtreme design, 3D real-time DRC (design rule checking), and SiP manufacture.

Extensively illustrated throughout, System in Package Design and Simulation covers an array of issues of vital concern for SiP design and fabrication electronics engineers, as well as SiP users, including:

• Cavity and sacked dies design
• FlipChip and RDL design
• Routing and coppering
• 3D Real-Time DRC check
• SiP simulation technology
• Mentor SiP Design and Simulation Platform

Designed to function equally well as a reference, tutorial, and self-study, System in Package Design and Simulation is an indispensable working resource for every SiP designer, especially those who use Mentor design tools.

Su questo libro

Informazioni sull'autore

Mr. Suny Li (Li Yang) is a SiP/PCB Technical Specialist in China; he now works in AcconSys Technology Co. Ltd, (a Mentor Authorized Distributor for China). Suny has guided and consulted on dozens of SiP projects in China, accumulating plentiful experience in SiP design and simulation. Suny has 10 years' experience in and knowledge of Application Engineer for Mentor, especially in SiP/PCB design and simulation. Before this, Suny worked in the Chinese Academy of Science and SIEMENS for several years. He has more than seven years' experience in hardware design (HW system design, PCB layout, high–speed signal integrity, power integrity, EMI, etc.). In the course of his work, Suny has published papers and acquired four patents, and he continues with this work. Suny is a senior member of the Chinese Institute of Electronics (CIE) and a member of the IEEE. Suny graduated from Beijing University of Aeronautics & Astronautics (BUAA) in 2000, receiving Master's and Bachelor's degrees in Science and Technology of Aeronautics & Astronautics.

Dalla quarta di copertina

An advanced reference documenting, in detail, every step of a real System-in-Package (SiP) design flow

Written by an engineer at the leading edge of SiP design and implementation, this book demonstrates how to design SiPs using Mentor EE Flow. Key topics covered include wire bonding, die stacks, cavity, flip chip and RDL (redistribution layer), Embedded Passive, RF design, concurrent design, Xtreme design, 3D real-time DRC (design rule checking), and SiP manufacture.

Extensively illustrated throughout, System-in-Package Design and Simulation covers an array of issues of vital concern for SiP design and fabrication electronics engineers, as well as SiP users, including:

• Cavity and stacked dies design
• FlipChip and RDL design
• Routing and coppering
• 3D Real-Time DRC check
• SiP simulation technology
• Mentor SiP Design and Simulation Platform

Designed to function equally well as a reference, tutorial, and self-study, System-in-Package Design and Simulation is an indispensable working resource for every SiP designer, especially those who use Mentor design tools.

Dal risvolto di copertina interno

An advanced reference documenting, in detail, every step of a real System-in-Package (SiP) design flow
 
Written by an engineer at the leading edge of SiP design and implementation, this book demonstrates how to design SiPs using Mentor EE Flow. Key topics covered include wire bonding, die stacks, cavity, flip chip and RDL (redistribution layer), Embedded Passive, RF design, concurrent design, Xtreme design, 3D real-time DRC (design rule checking), and SiP manufacture.
 
Extensively illustrated throughout, System-in-Package Design and Simulation covers an array of issues of vital concern for SiP design and fabrication electronics engineers, as well as SiP users, including:
* Cavity and stacked dies design
* FlipChip and RDL design
* Routing and coppering
* 3D Real-Time DRC check
* SiP simulation technology
* Mentor SiP Design and Simulation Platform
 
Designed to function equally well as a reference, tutorial, and self-study, System-in-Package Design and Simulation is an indispensable working resource for every SiP designer, especially those who use Mentor design tools.

Dettagli dell'edizione

• Editore: John Wiley & Sons Inc
• Data di pubblicazione: 2017
• Lingua: Inglese
• ISBN 10: 1119045932
• ISBN 13: 9781119045939
• Rilegatura: Copertina rigida
• Numero edizione: 1
• Numero di pagine: 477
• Contatto del produttore: non disponibile
• Persona responsabile: GPSR Kontakt; gpsr@libri.de; ; Europaallee 1; Bad Hersfeld; 36244; Germania