Articoli correlati a Analog Circuit Design: Low-Power Low-Voltage, Integrated...

Analog Circuit Design: Low-Power Low-Voltage, Integrated Filters and Smart Power - Brossura

 
9781441951496: Analog Circuit Design: Low-Power Low-Voltage, Integrated Filters and Smart Power

Sinossi

The realization of signal sampling and quantization at high sample rates with low power dissipation is an important goal in many applications, includ­ ing portable video devices such as camcorders, personal communication devices such as wireless LAN transceivers, in the read channels of magnetic storage devices using digital data detection, and many others. This paper describes architecture and circuit approaches for the design of high-speed, low-power pipeline analog-to-digital converters in CMOS. Here the term high speed is taken to imply sampling rates above 1 Mhz. In the first section the dif­ ferent conversion techniques applicable in this range of sample rates is dis­ cussed. Following that the particular problems associated with power minimization in video-rate pipeline ADCs is discussed. These include optimi­ zation of capacitor sizes, design of low-voltage transmission gates, and opti­ mization of switched capacitor gain blocks and operational amplifiers for minimum power dissipation. As an example of the application of these tech­ niques, the design of a power-optimized lO-bit pipeline AID converter (ADC) that achieves =1. 67 mW per MS/s of sampling rate from 1 MS/s to 20 MS/s is described. 2. Techniques for CMOS Video-Rate AID Conversion Analog-to-digital conversion techniques can be categorized in many ways. One convenient means of comparing techniques is to examine the number of "analog clock cycles" required to produce one effective output sample of the signal being quantized.

Le informazioni nella sezione "Riassunto" possono far riferimento a edizioni diverse di questo titolo.

Contenuti

Preface. Part I: Low-Power Low-Voltage. Introduction. Low-Power Low-Voltage Limitations and Prospects in Analog Design; E.A. Vittoz. Design Considerations for High-Speed Low-Power Low-Voltage CMOS Analog-to-Digital Converters; T.B. Cho, D.W. Cline, C.S.G. Conroy, P.R. Gray. Micro-Power Analog-Filter Design; G. Groenewold, B. Monna, B. Nauta. Low Power Oversampled A/D Converters; E. Dijkstra, O. Nys, E. Blumenkrantz. Low Voltage Low Power Design Techniques for Medical Devices; D.A. Wayne. Part II: Integrated Filters. Introduction. Developments in Integrated Continuous Time Filters; Y. Tsividis. Analog Integrated Polyphase Filters; M. Steyaert, J. Crols. Transconductor-C Filters; J.M. Khoury. Recent Advances in Switched-Current Filters; J.B. Hughes, K.W. Moulding. Switched Capacitor Filters; R.C.J. Taylor. Current-Mode Continuous-Time Filters; D.J. Allstot, R.H. Zele. Part III: Smart Power. Introduction. Modeling of Transient Heating in Smart Power Applications; L. Borucki. Smart Power Circuits for Power Switches including Diagnostic Functions; H. Zitta. Design and Circuit Techniques of Integrated Switching Voltage Regulators; T. Szepesi. High Voltage ICs for Mains Applications; F. Schoofs. DMOS Transistors in Smart Power Building Blocks; B. Graindourze. Design Methodologies for Mixed Power Integrated Circuits; B. Murari. Slide Supplement.

Le informazioni nella sezione "Su questo libro" possono far riferimento a edizioni diverse di questo titolo.

EUR 9,70 per la spedizione da Germania a Italia

Destinazione, tempi e costi

Risultati della ricerca per Analog Circuit Design: Low-Power Low-Voltage, Integrated...

Immagini fornite dal venditore

Plassche, Rudy J. van de|Sansen, Willy M.C.|Huijsing, Johan
Editore: Springer US, 2010
ISBN 10: 1441951490 ISBN 13: 9781441951496
Nuovo Brossura

Da: moluna, Greven, Germania

Valutazione del venditore 5 su 5 stelle 5 stelle, Maggiori informazioni sulle valutazioni dei venditori

Condizione: New. Codice articolo 4175476

Contatta il venditore

Compra nuovo

EUR 180,07
Convertire valuta
Spese di spedizione: EUR 9,70
Da: Germania a: Italia
Destinazione, tempi e costi

Quantità: Più di 20 disponibili

Aggiungi al carrello

Immagini fornite dal venditore

Rudy J. Van De Plassche
Editore: Springer US Dez 2010, 2010
ISBN 10: 1441951490 ISBN 13: 9781441951496
Nuovo Taschenbuch
Print on Demand

Da: BuchWeltWeit Ludwig Meier e.K., Bergisch Gladbach, Germania

Valutazione del venditore 5 su 5 stelle 5 stelle, Maggiori informazioni sulle valutazioni dei venditori

Taschenbuch. Condizione: Neu. This item is printed on demand - it takes 3-4 days longer - Neuware -The realization of signal sampling and quantization at high sample rates with low power dissipation is an important goal in many applications, includ ing portable video devices such as camcorders, personal communication devices such as wireless LAN transceivers, in the read channels of magnetic storage devices using digital data detection, and many others. This paper describes architecture and circuit approaches for the design of high-speed, low-power pipeline analog-to-digital converters in CMOS. Here the term high speed is taken to imply sampling rates above 1 Mhz. In the first section the dif ferent conversion techniques applicable in this range of sample rates is dis cussed. Following that the particular problems associated with power minimization in video-rate pipeline ADCs is discussed. These include optimi zation of capacitor sizes, design of low-voltage transmission gates, and opti mization of switched capacitor gain blocks and operational amplifiers for minimum power dissipation. As an example of the application of these tech niques, the design of a power-optimized lO-bit pipeline AID converter (ADC) that achieves =1. 67 mW per MS/s of sampling rate from 1 MS/s to 20 MS/s is described. 2. Techniques for CMOS Video-Rate AID Conversion Analog-to-digital conversion techniques can be categorized in many ways. One convenient means of comparing techniques is to examine the number of 'analog clock cycles' required to produce one effective output sample of the signal being quantized. 412 pp. Englisch. Codice articolo 9781441951496

Contatta il venditore

Compra nuovo

EUR 213,99
Convertire valuta
Spese di spedizione: EUR 11,00
Da: Germania a: Italia
Destinazione, tempi e costi

Quantità: 2 disponibili

Aggiungi al carrello

Immagini fornite dal venditore

Rudy J. Van De Plassche
ISBN 10: 1441951490 ISBN 13: 9781441951496
Nuovo Taschenbuch

Da: buchversandmimpf2000, Emtmannsberg, BAYE, Germania

Valutazione del venditore 5 su 5 stelle 5 stelle, Maggiori informazioni sulle valutazioni dei venditori

Taschenbuch. Condizione: Neu. Neuware -The realization of signal sampling and quantization at high sample rates with low power dissipation is an important goal in many applications, includ ing portable video devices such as camcorders, personal communication devices such as wireless LAN transceivers, in the read channels of magnetic storage devices using digital data detection, and many others. This paper describes architecture and circuit approaches for the design of high-speed, low-power pipeline analog-to-digital converters in CMOS. Here the term high speed is taken to imply sampling rates above 1 Mhz. In the first section the dif ferent conversion techniques applicable in this range of sample rates is dis cussed. Following that the particular problems associated with power minimization in video-rate pipeline ADCs is discussed. These include optimi zation of capacitor sizes, design of low-voltage transmission gates, and opti mization of switched capacitor gain blocks and operational amplifiers for minimum power dissipation. As an example of the application of these tech niques, the design of a power-optimized lO-bit pipeline AID converter (ADC) that achieves =1. 67 mW per MS/s of sampling rate from 1 MS/s to 20 MS/s is described. 2. Techniques for CMOS Video-Rate AID Conversion Analog-to-digital conversion techniques can be categorized in many ways. One convenient means of comparing techniques is to examine the number of 'analog clock cycles' required to produce one effective output sample of the signal being quantized.Springer Verlag GmbH, Tiergartenstr. 17, 69121 Heidelberg 412 pp. Englisch. Codice articolo 9781441951496

Contatta il venditore

Compra nuovo

EUR 213,99
Convertire valuta
Spese di spedizione: EUR 15,00
Da: Germania a: Italia
Destinazione, tempi e costi

Quantità: 2 disponibili

Aggiungi al carrello

Foto dell'editore

Editore: Springer, 2010
ISBN 10: 1441951490 ISBN 13: 9781441951496
Nuovo Brossura

Da: Ria Christie Collections, Uxbridge, Regno Unito

Valutazione del venditore 5 su 5 stelle 5 stelle, Maggiori informazioni sulle valutazioni dei venditori

Condizione: New. In. Codice articolo ria9781441951496_new

Contatta il venditore

Compra nuovo

EUR 219,61
Convertire valuta
Spese di spedizione: EUR 10,41
Da: Regno Unito a: Italia
Destinazione, tempi e costi

Quantità: Più di 20 disponibili

Aggiungi al carrello

Immagini fornite dal venditore

Rudy J. Van De Plassche
Editore: Springer US, Springer US, 2010
ISBN 10: 1441951490 ISBN 13: 9781441951496
Nuovo Taschenbuch

Da: AHA-BUCH GmbH, Einbeck, Germania

Valutazione del venditore 5 su 5 stelle 5 stelle, Maggiori informazioni sulle valutazioni dei venditori

Taschenbuch. Condizione: Neu. Druck auf Anfrage Neuware - Printed after ordering - The realization of signal sampling and quantization at high sample rates with low power dissipation is an important goal in many applications, includ ing portable video devices such as camcorders, personal communication devices such as wireless LAN transceivers, in the read channels of magnetic storage devices using digital data detection, and many others. This paper describes architecture and circuit approaches for the design of high-speed, low-power pipeline analog-to-digital converters in CMOS. Here the term high speed is taken to imply sampling rates above 1 Mhz. In the first section the dif ferent conversion techniques applicable in this range of sample rates is dis cussed. Following that the particular problems associated with power minimization in video-rate pipeline ADCs is discussed. These include optimi zation of capacitor sizes, design of low-voltage transmission gates, and opti mization of switched capacitor gain blocks and operational amplifiers for minimum power dissipation. As an example of the application of these tech niques, the design of a power-optimized lO-bit pipeline AID converter (ADC) that achieves =1. 67 mW per MS/s of sampling rate from 1 MS/s to 20 MS/s is described. 2. Techniques for CMOS Video-Rate AID Conversion Analog-to-digital conversion techniques can be categorized in many ways. One convenient means of comparing techniques is to examine the number of 'analog clock cycles' required to produce one effective output sample of the signal being quantized. Codice articolo 9781441951496

Contatta il venditore

Compra nuovo

EUR 223,11
Convertire valuta
Spese di spedizione: EUR 14,99
Da: Germania a: Italia
Destinazione, tempi e costi

Quantità: 1 disponibili

Aggiungi al carrello

Foto dell'editore

Editore: Springer, 2010
ISBN 10: 1441951490 ISBN 13: 9781441951496
Nuovo Brossura

Da: Lucky's Textbooks, Dallas, TX, U.S.A.

Valutazione del venditore 5 su 5 stelle 5 stelle, Maggiori informazioni sulle valutazioni dei venditori

Condizione: New. Codice articolo ABLIING23Mar2411530296538

Contatta il venditore

Compra nuovo

EUR 202,57
Convertire valuta
Spese di spedizione: EUR 64,07
Da: U.S.A. a: Italia
Destinazione, tempi e costi

Quantità: Più di 20 disponibili

Aggiungi al carrello

Foto dell'editore

Plassche, Rudy J. van de (Editor) / Sansen, Willy M.C. (Editor) / Huijsing, Johan (Editor)
Editore: Springer US, 1995
ISBN 10: 1441951490 ISBN 13: 9781441951496
Nuovo Paperback

Da: Revaluation Books, Exeter, Regno Unito

Valutazione del venditore 5 su 5 stelle 5 stelle, Maggiori informazioni sulle valutazioni dei venditori

Paperback. Condizione: Brand New. 392 pages. 9.00x6.25x0.93 inches. In Stock. Codice articolo x-1441951490

Contatta il venditore

Compra nuovo

EUR 299,37
Convertire valuta
Spese di spedizione: EUR 11,58
Da: Regno Unito a: Italia
Destinazione, tempi e costi

Quantità: 2 disponibili

Aggiungi al carrello