Architecture-Independent Loop Parallelisation - Brossura

Calinescu, Radu C.

 
9781447111979: Architecture-Independent Loop Parallelisation
Brossura
ISBN 10: 1447111974 ISBN 13: 9781447111979
Casa editrice: Springer, 2011

Sinossi

Architecture-independent programming and automatic parallelisation have long been regarded as two different means of alleviating the prohibitive costs of parallel software development. Building on recent advances in both areas, Architecture-Independent Loop Parallelisation proposes a unified approach to the parallelisation of scientific computing code. This novel approach is based on the bulk-synchronous parallel model of computation, and succeeds in automatically generating parallel code that is architecture-independent, scalable, and of analytically predictable performance.

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Contenuti

INTRODUCTION: Motivation. Parallelisation approach proposed in the book. Organisation of the book.- THE BULK-SYNCHRONOUS PARALLEL MODEL: Introduction. Bulk-synchronous parallel computers. The BSP programming model. The BSP cost model. Assessing the efficiency of BSP code. The development of BSP applications. BSP pseudocode.- DATA DEPENDENCE ANALYSIS AND CODE TRANSFORMATION: Introduction. Data dependence. Code transformation techniques.- COMMUNICATION OVERHEADS IN LOOP NEST SCHEDULING: Introduction. Related work. Communication overheads due to input data. Inter-tile communication overheads. Summary.- TEMPLATE-MATCHING PARALLELISATION: Introduction. Related work. Communication-free scheduling. Wavefront block scheduling. Iterative scheduling. Reduction scheduling. Recurrence scheduling. Scheduling broadcast loop nests. Summary.- GENERIC LOOP NEST PARALLELISATION: Introduction. Related work. Data dependence analysis. Potential parallelism identification. Data and computation partitioning. Communication and synchronisation generation. Performance analysis. Summary.- A STRATEGY AND A TOOL FOR ARCHITECTURE-INDEPENDENT LOOP PARALLELISATION: Introduction. Related work. A two-phase strategy for loop nest parallelisation. BSPscheduler: an architecture-independent loop paralleliser. Summary.- THE EFFECTIVENESS OF ARCHITECTURE-INDEPENDENT LOOP PARALLELISATION: Introduction. Matrix-vector and matrix-matrix multiplication. LU decomposition. Algebraic path problem. Finite difference iteration on a Cartesian grid. Merging. Summary.- CONCLUSIONS: Summary of contributions and concluding remarks. Future work directions.- A: THEOREM PROOFS.- B: SYNTAX OF THE BSPSCHEDULER INPUT LANGUAGE.- C: SYNTAX OF THE BSPSCHEDULER OUTPUT LANGUAGE.- D: AUTOMATICALLY GENERATED CODE FOR EXAMPLE 7.5.- Bibliography.- Index.

Product Description

Book by Calinescu Radu C

Le informazioni nella sezione "Su questo libro" possono far riferimento a edizioni diverse di questo titolo.

Editore
Springer
Data di pubblicazione
2011
Lingua
Inglese
ISBN 10 
1447111974
ISBN 13 
9781447111979
Rilegatura
Copertina flessibile
Numero di pagine
196
Contatto del produttore
ProductSafety@springernature.com
ProductSafety@springernature.com

Poststr. 9
Darmstadt
64293
Germania

Altre edizioni note dello stesso titolo

9781852332846: Architecture-Independent Loop Parallelisation

Edizione in evidenza

ISBN 10:  1852332840 ISBN 13:  9781852332846
Casa editrice: Springer-Nature New York Inc, 2000
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