This book presents a novel approach for Architecture Description Language (ADL)-based instruction-set description that enables the automatic retargeting of the complete software toolkit from a single ADL processor model.
Le informazioni nella sezione "Riassunto" possono far riferimento a edizioni diverse di questo titolo.
C Compilers for ASIPs: Automatic Compiler Generation with LISA
by:
Manuel Hohenauer
Rainer Leupers
The ever increasing complexity and performance requirements of modern electronic devices are changing the way embedded systems are designed and implemented today. The current trend is towards programmable System-on-Chip platforms which employ an increasing number of Application Specific Instruction-set Processors (ASIPs) as building blocks. ASIP design platforms comprise retargetable software development tools that can be adapted quickly to varying target processor configurations. Such tools are usually driven by a processor model given in an Architecture Description Language (ADL), such as LISA. One of the major challenges in this context is retargetable compilation for high-level programming languages like C. First of all, an ADL must capture the architectural information needed for the tool generation in an unambiguous and consistent way. This is particularly difficult for compiler and instruction-set simulator. Moreover, there exists a trade-off between the compiler's flexibility and the quality of compiled code.
This book presents a novel approach for ADL-based instruction-set description in order to enable the automatic retargeting of the complete software toolkit from a single ADL processor model. Additionally, this book includes retargetable optimization techniques for architectures with SIMD and Predicated Execution support. Both allows a high speedup in compiler generation and combines high flexibility with acceptable code quality at the same time. Coverage includes a comprehensive overview of retargetable compilers and ADL based processor design, a methodology and related toolkit to generate a C-compiler fully automatically from an ADL processor model, and retargetable code optimization techniques.
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Condizione: New. Dieser Artikel ist ein Print on Demand Artikel und wird nach Ihrer Bestellung fuer Sie gedruckt. Presents a strong background and various perspectives of architecture description language (ADL)-based processor design and the retargetable compilation problemProvides the history of ADL based processor design, making the reader knowledgeable abo. Codice articolo 11466663
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Taschenbuch. Condizione: Neu. This item is printed on demand - it takes 3-4 days longer - Neuware -C Compilers for ASIPs: Automatic Compiler Generation with LISA by: Manuel HohenauerRainer LeupersThe ever increasing complexity and performance requirements of modern electronic devices are changing the way embedded systems are designed and implemented today. The current trend is towards programmable System-on-Chip platforms which employ an increasing number of Application Specific Instruction-set Processors (ASIPs) as building blocks. ASIP design platforms comprise retargetable software development tools that can be adapted quickly to varying target processor configurations. Such tools are usually driven by a processor model given in an Architecture Description Language (ADL), such as LISA. One of the major challenges in this context is retargetable compilation for high-level programming languages like C. First of all, an ADL must capture the architectural information needed for the tool generation in an unambiguous and consistent way. This is particularly difficult for compiler and instruction-set simulator. Moreover, there exists a trade-off between the compiler's flexibility and the quality of compiled code. This book presents a novel approach for ADL-based instruction-set description in order to enable the automatic retargeting of the complete software toolkit from a single ADL processor model. Additionally, this book includes retargetable optimization techniques for architectures with SIMD and Predicated Execution support. Both allows a high speedup in compiler generation and combines high flexibility with acceptable code quality at the same time. Coverage includes a comprehensive overview of retargetable compilers and ADL based processor design, a methodology and related toolkit to generate a C-compiler fully automatically from an ADL processor model, and retargetable code optimization techniques. Presents a strong background and various perspectives of architecture description language (ADL)-based processor design and the retargetable compilation problem;Provides the history of ADL based processor design, making the reader knowledgeable about the past research as well as the difficulties faced over time;Offers an ADL based modelling formalism and corresponding implementation methods, which can be used for automatic compiler retargeting to quickly obtain compiler support for newly developed ASIPs;Presents retargetable optimization techniques for common ASIP features, which can be quickly adapted to varying target processor configurations and help to meet the stringent performance requirements of embedded applications. 240 pp. Englisch. Codice articolo 9781489984050
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Taschenbuch. Condizione: Neu. This item is printed on demand - Print on Demand Titel. Neuware -formoredesigniterationsduetodeep-submicroneffects. Thisphenomenonisalso referredtoas crisis of complexity[103]andcomesalongwithexponentiallygr- ing non-recurring engineering (NRE) costs (Fig. 1. 2) to design and manufacture chips. Understandably,thesecostsonlyamortizeforverylargevolumesorhigh-e nd products. $100. 000. 000. 000,00 $10. 000. 000. 000,00 $1. 000. 000. 000,00 $100. 000. 000,00 RTL Methodology Future Improvements $10. 000. 000,00 1990 1995 2000 2005 2010 2015 Fig. 1.Springer Verlag GmbH, Tiergartenstr. 17, 69121 Heidelberg 240 pp. Englisch. Codice articolo 9781489984050
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Taschenbuch. Condizione: Neu. Druck auf Anfrage Neuware - Printed after ordering - C Compilers for ASIPs: Automatic Compiler Generation with LISA by: Manuel HohenauerRainer LeupersThe ever increasing complexity and performance requirements of modern electronic devices are changing the way embedded systems are designed and implemented today. The current trend is towards programmable System-on-Chip platforms which employ an increasing number of Application Specific Instruction-set Processors (ASIPs) as building blocks. ASIP design platforms comprise retargetable software development tools that can be adapted quickly to varying target processor configurations. Such tools are usually driven by a processor model given in an Architecture Description Language (ADL), such as LISA. One of the major challenges in this context is retargetable compilation for high-level programming languages like C. First of all, an ADL must capture the architectural information needed for the tool generation in an unambiguous and consistent way. This is particularly difficult for compiler and instruction-set simulator. Moreover, there exists a trade-off between the compiler's flexibility and the quality of compiled code. This book presents a novel approach for ADL-based instruction-set description in order to enable the automatic retargeting of the complete software toolkit from a single ADL processor model. Additionally, this book includes retargetable optimization techniques for architectures with SIMD and Predicated Execution support. Both allows a high speedup in compiler generation and combines high flexibility with acceptable code quality at the same time. Coverage includes a comprehensive overview of retargetable compilers and ADL based processor design, a methodology and related toolkit to generate a C-compiler fully automatically from an ADL processor model, and retargetable code optimization techniques. Presents a strong background and various perspectives of architecture description language (ADL)-based processor design and the retargetable compilation problem;Provides the history of ADL based processor design, making the reader knowledgeable about the past research as well as the difficulties faced over time;Offers an ADL based modelling formalism and corresponding implementation methods, which can be used for automatic compiler retargeting to quickly obtain compiler support for newly developed ASIPs;Presents retargetable optimization techniques for common ASIP features, which can be quickly adapted to varying target processor configurations and help to meet the stringent performance requirements of embedded applications. Codice articolo 9781489984050
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