Modeling of VSLI Interconnections One-Semester Course - Brossura

Goel, Ashok K.

 
9781606505120: Modeling of VSLI Interconnections One-Semester Course
Brossura
ISBN 10: 1606505122 ISBN 13: 9781606505120
Casa editrice: Momentum Pr, 2014

Sinossi

Quantitative understanding of the parasitic capacitances and inductances, and the resultant propagation delays and crosstalk phenomena associated with the metallic interconnections on the very large scale integrated (VLSI) circuits has become extremely important for the optimum design of the state-of-the-art integrated circuits. More than 65 percent of the delays on the integrated circuit chip occur in the interconnections and not in the transistors on the chip. Mathematical techniques to model the parasitic capacitances, inductances, propagation delays, crosstalk noise, and electromigration-induced failure associated with the interconnections in the realistic high-density environment on a chip will be discussed. A One-Semester Course in Modeling of VLSI Interconnections also includes an overview of the future interconnection technologies for the nanotechnology circuits.

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Informazioni sull'autore

Associate Professor, Michigan Technological University

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Editore
Momentum Pr
Data di pubblicazione
2014
Lingua
Inglese
ISBN 10 
1606505122
ISBN 13 
9781606505120
Rilegatura
Copertina flessibile
Numero di pagine
340
Contatto del produttore
non disponibile
Persona responsabile
non disponibile