Written by an acknowledged expert in the field, this book focuses on approaches for designing secure hardware accelerators for digital signal processing and image processing, which are also optimised for performance and efficiency. State-of-the art security and optimization algorithms are presented, and their roles in the design of secured hardware accelerators for DSP, multimedia and image processing applications are explored.
The book begins with an introduction to the principles of secured and optimized hardware accelerators for DSP and image processing applications. The following topics are then given thorough and systematic coverage: cryptography driven IP steganography for DSP hardware accelerators; double line of defence to secure JPEG codec hardware for medical imaging systems; integrating multi-key based structural obfuscation and low-level watermarking for double line of defence of DSP hardware accelerators; multimodal hardware accelerators for image processing filters; fingerprint biometric for securing hardware accelerators; key-triggered hash-chaining based encoded hardware steganography for Securing DSP hardware accelerators; designing N-point DFT hardware accelerator using obfuscation and steganography; and structural transformation and obfuscation frameworks for data-intensive IPs.
Intended primarily for researchers and practicing engineers, the book will also be of interest to graduate students with a particular interest in hardware device security.
Le informazioni nella sezione "Riassunto" possono far riferimento a edizioni diverse di questo titolo.
Da: GreatBookPrices, Columbia, MD, U.S.A.
Condizione: New. Codice articolo 43524782-n
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Da: Rarewaves USA, HEBRON, KY, U.S.A.
Hardback. Condizione: New. Written by an acknowledged expert in the field, this book focuses on approaches for designing secure hardware accelerators for digital signal processing and image processing, which are also optimised for performance and efficiency. State-of-the art security and optimization algorithms are presented, and their roles in the design of secured hardware accelerators for DSP, multimedia and image processing applications are explored. The book begins with an introduction to the principles of secured and optimized hardware accelerators for DSP and image processing applications. The following topics are then given thorough and systematic coverage: cryptography driven IP steganography for DSP hardware accelerators; double line of defence to secure JPEG codec hardware for medical imaging systems; integrating multi-key based structural obfuscation and low-level watermarking for double line of defence of DSP hardware accelerators; multimodal hardware accelerators for image processing filters; fingerprint biometric for securing hardware accelerators; key-triggered hash-chaining based encoded hardware steganography for Securing DSP hardware accelerators; designing N-point DFT hardware accelerator using obfuscation and steganography; and structural transformation and obfuscation frameworks for data-intensive IPs. Intended primarily for researchers and practicing engineers, the book will also be of interest to graduate students with a particular interest in hardware device security. Codice articolo LU-9781839533068
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Da: GreatBookPrices, Columbia, MD, U.S.A.
Condizione: As New. Unread book in perfect condition. Codice articolo 43524782
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Da: GreatBookPricesUK, Woodford Green, Regno Unito
Condizione: New. Codice articolo 43524782-n
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Da: GreatBookPricesUK, Woodford Green, Regno Unito
Condizione: As New. Unread book in perfect condition. Codice articolo 43524782
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Da: PBShop.store UK, Fairford, GLOS, Regno Unito
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Da: PBShop.store US, Wood Dale, IL, U.S.A.
HRD. Condizione: New. New Book. Shipped from UK. THIS BOOK IS PRINTED ON DEMAND. Established seller since 2000. Codice articolo L1-9781839533068
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Da: THE SAINT BOOKSTORE, Southport, Regno Unito
Hardback. Condizione: New. This item is printed on demand. New copy - Usually dispatched within 5-9 working days. Codice articolo C9781839533068
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Da: Rarewaves USA United, HEBRON, KY, U.S.A.
Hardback. Condizione: New. Written by an acknowledged expert in the field, this book focuses on approaches for designing secure hardware accelerators for digital signal processing and image processing, which are also optimised for performance and efficiency. State-of-the art security and optimization algorithms are presented, and their roles in the design of secured hardware accelerators for DSP, multimedia and image processing applications are explored. The book begins with an introduction to the principles of secured and optimized hardware accelerators for DSP and image processing applications. The following topics are then given thorough and systematic coverage: cryptography driven IP steganography for DSP hardware accelerators; double line of defence to secure JPEG codec hardware for medical imaging systems; integrating multi-key based structural obfuscation and low-level watermarking for double line of defence of DSP hardware accelerators; multimodal hardware accelerators for image processing filters; fingerprint biometric for securing hardware accelerators; key-triggered hash-chaining based encoded hardware steganography for Securing DSP hardware accelerators; designing N-point DFT hardware accelerator using obfuscation and steganography; and structural transformation and obfuscation frameworks for data-intensive IPs. Intended primarily for researchers and practicing engineers, the book will also be of interest to graduate students with a particular interest in hardware device security. Codice articolo LU-9781839533068
Quantità: Più di 20 disponibili