System Level Design from HW/SW to Memory for Embedded Systems: 5th IFIP TC 10 International Embedded Systems Symposium, IESS 2015, Foz do Iguaçu, Brazil, November 3–6, 2015, Proceedings: 523 - Brossura

Brossura

ISBN 10: 3030079171 ISBN 13: 9783030079178

Casa editrice: Springer, 2018

Riassunto

This book constitutes the refereed proceedings of the 5th IFIP TC 10 International Embedded Systems Symposium, IESS 2015, held in Foz do Iguaçu, Brazil, in November 2015.

The 18 full revised papers presented were carefully reviewed and selected from 25 submissions. The papers present a broad discussion on the design, analysis and verification of embedded and cyber-physical systems including design methodologies, verification, performance analysis, and real-time systems design. They are organized in the following topical sections: cyber-physical systems, system-level design; multi/many-core system design; memory system design; and embedded HW/SW design and applications.

Dettagli dell'edizione

• Editore: Springer
• Data di pubblicazione: 2018
• Lingua: Inglese
• ISBN 10: 3030079171
• ISBN 13: 9783030079178
• Rilegatura: Copertina flessibile
• Numero di pagine: 244
• Redattore: Götz Marcelo, Schirner Gunar, Wehrmeister Marco Aurélio, Al Faruque Mohammad Abdullah, Rettberg Achim
• Contatto del produttore: Springer Nature Customer Service Center GmbH; ProductSafety@springernature.com; ; Europaplatz 3,69115 Heidelberg, Germany; Heidelberg; 69115; Germania