Automatic Analog Ic Sizing and Optimization Constrained With Pvt Corners and Layout Effects - Rilegato

Loureno, Nuno; Martins, Ricardo; Horta, Nuno

 
9783319420363: Automatic Analog Ic Sizing and Optimization Constrained With Pvt Corners and Layout Effects
Rilegato
ISBN 10: 3319420364 ISBN 13: 9783319420363
Casa editrice: Springer Nature, 2016

Sinossi

This book introduces readers to a variety of tools for automatic analog integrated circuit (IC) sizing and optimization. The authors provide a historical perspective on the early methods proposed to tackle automatic analog circuit sizing, with emphasis on the methodologies to size and optimize the circuit, and on the methodologies to estimate the circuit’s performance. The discussion also includes robust circuit design and optimization and the most recent advances in layout-aware analog sizing approaches. The authors describe a methodology for an automatic flow for analog IC design, including details of the inputs and interfaces, multi-objective optimization techniques, and the enhancements made in the base implementation by using machine leaning techniques. The Gradient model is discussed in detail, along with the methods to include layout effects in the circuit sizing. The concepts and algorithms of all the modules are thoroughly described, enabling readers to reproduce the methodologies, improve the quality of their designs, or use them as starting point for a new tool. An extensive set of application examples is included to demonstrate the capabilities and features of the methodologies described.

Le informazioni nella sezione "Riassunto" possono far riferimento a edizioni diverse di questo titolo.

Informazioni sull?autore

Nuno C.C. Lourenço is a Post-Doctoral Researcher in the Integrated Circuits group, within the Instituto de Telecomunicações in Lisbon, Portugal.

Ricardo M. F. Martins is a Post-Doctoral Researcher in the Integrated Circuits group, within the Instituto de Telecomunicações in Lisbon, Portugal.

Nuno C. G. Horta is Professor at Instituto Superior Técnico from University of Lisbon and Senior Researcher in the Integrated Circuits group, within the Instituto de Telecomunicações in Lisbon, Portugal.

Dalla quarta di copertina

This book introduces readers to a variety of tools for automatic analog integrated circuit (IC) sizing and optimization. The authors provide a historical perspective on the early methods proposed to tackle automatic analog circuit sizing, with emphasis on the methodologies to size and optimize the circuit, and on the methodologies to estimate the circuit’s performance. The discussion also includes robust circuit design and optimization and the most recent advances in layout-aware analog sizing approaches. The authors describe a methodology for an automatic flow for analog IC design, including details of the inputs and interfaces, multi-objective optimization techniques, and the enhancements made in the base implementation by using machine leaning techniques. The Gradient model is discussed in detail, along with the methods to include layout effects in the circuit sizing. The concepts and algorithms of all the modules are thoroughly described, enabling readers to reproduce the methodologies, improve the quality of their designs, or use them as starting point for a new tool. An extensive set of application examples is included to demonstrate the capabilities and features of the methodologies described.

Le informazioni nella sezione "Su questo libro" possono far riferimento a edizioni diverse di questo titolo.

Editore
Springer Nature
Data di pubblicazione
2016
Lingua
Inglese
ISBN 10 
3319420364
ISBN 13 
9783319420363
Rilegatura
Copertina rigida
Numero edizione
1
Numero di pagine
212
Contatto del produttore
ProductSafety@springernature.com
ProductSafety@springernature.com

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Altre edizioni note dello stesso titolo

9783319824857: Automatic Analog IC Sizing and Optimization Constrained with PVT Corners and Layout Effects

Edizione in evidenza

ISBN 10:  3319824856 ISBN 13:  9783319824857
Casa editrice: Springer, 2018
Brossura