Formal Verification of Floating-Point Hardware Design: A Mathematical Approach - Rilegato

Russinoff

Rilegato

ISBN 10: 3319955128 ISBN 13: 9783319955124

Casa editrice: Springer, 2018

Riassunto

<p>This is the first book to focus on the problem of ensuring the correctness of floating-point hardware designs through mathematical methods.&nbsp; <i>Formal Verification of Floating-Point Hardware Design</i> advances a verification methodology based on a unified theory of register-transfer logic and floating-point arithmetic that has been developed and applied to the formal verification of commercial floating-point units over the course of more than two decades, during which the author was employed by several major microprocessor design companies.</p><p>&nbsp;The book consists of five parts, the first two of which present a rigorous exposition of the general theory based on the first principles of arithmetic. Part I covers bit vectors and the bit manipulation primitives, integer and fixed-point encodings, and bit-wise logical operations.&nbsp; Part II addresses the properties of floating-point numbers, the formats in which they are encoded as bit vectors, and the various modes of floating-point rounding.&nbsp; In Part III, the theory is extended to the analysis of several algorithms and optimization techniques that are commonly used in commercial implementations of elementary arithmetic operations.&nbsp; As a basis for the formal verification of such implementations, Part IV contains high-level specifications of correctness of the basic arithmetic instructions of several major industry-standard floating-point architectures, including all details pertaining to the handling of exceptional conditions.&nbsp; Part V illustrates the methodology, applying the preceding theory to the comprehensive verification of a state-of-the-art commercial floating-point unit.</p><p>&nbsp;All of these results have been formalized in the logic of the ACL2 theorem prover and mechanically checked to ensure their correctness.&nbsp; They are presented here, however, in simple conventional mathematical notation.&nbsp; The book presupposes no familiarity with ACL2, logic design, or any mathematics beyond basic high school algebra.&nbsp; It will be of interest to verification engineers as well as arithmetic circuit designers who appreciate the value of a rigorous approach to their art, and is suitable as a graduate text in computer arithmetic.</p><p></p><p></p><p>&nbsp;</p><p><br></p>

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Informazioni sull'autore

<p></p>David M. Russinoff is Principal Engineer at Arm Holdings. He holds a bachelor's degree from the Massachusetts Institute of Technology and a doctorate from New York University, both in mathematics, and a master's in computer sciences from the University of Texas at Austin.&nbsp; He has spent twenty-five years developing mathematical methods of hardware verification, with an emphasis on interactive theorem proving, and applying them in the analysis of commercial designs, especially arithmetic circuits.&nbsp;&nbsp;

Dettagli dell'edizione

• Editore: Springer
• Data di pubblicazione: 2018
• Lingua: Inglese
• ISBN 10: 3319955128
• ISBN 13: 9783319955124
• Rilegatura: Copertina rigida
• Numero edizione: 1
• Numero di pagine: 408
• Contatto del produttore: non disponibile
• Persona responsabile: CMN Printpool Inh. Mathis Neumann; https://www.also.com/ec/cms5/en_6000/6000/index.jsp; ; Friedrich-Karl-Str. 9; Hamburg; Germania