Articoli correlati a CMOS Area Efficient Approximate Arithmetic Architectures
Sinossi
Approximate computation provide alternate solution to reduce energy consumption of high performance present day DSP application devices. Conventional multiplication and addition techniques consume a lot of energy. In this brief design of approximate arithmetic units for signal processing application is explored. First an approximate adder is proposed by changing the logic of basic full adder cell. The proposed adder cell has fewer transistor count compared to recent similar approach. Next, an approximate multiplier with low error is designed using lead one detection and selecting n/2 bits for an n bit input. The proposed n/2 bit approximate multiplier performs well in terms of error and power performance compared to recent similar approach. In continuation the approximate units are implemented in a Multiply-Accumulate(MAC) unit. The proposed approximate MAC unit provides significant improvement in power, area, and delay at the cost of little degrade in accuracy. Finally, the proposed MAC unit is implemented in filtering application to verify the functionality.
Le informazioni nella sezione "Riassunto" possono far riferimento a edizioni diverse di questo titolo.
L'autore
K.N.Vijeyakumar has completed his ME in Applied Electronics at GCT, Coimbatore. He has completed his research in CMOS Processor Design for Signal and Image Processing Applications. He has published research papers in more than 27 Journals and 50 Conferences in the areas of Processor Design, Design of Image and Signal Processing Applications.
Le informazioni nella sezione "Su questo libro" possono far riferimento a edizioni diverse di questo titolo.
Risultati della ricerca per CMOS Area Efficient Approximate Arithmetic Architectures
Immagini fornite dal venditore
CMOS Area Efficient Approximate Arithmetic Architectures
Editore:
LAP LAMBERT Academic Publishing Jun 2017, 2017
ISBN 10: 3330331798
ISBN 13: 9783330331792
Nuovo
Taschenbuch
Da: BuchWeltWeit Ludwig Meier e.K., Bergisch Gladbach, Germania
Valutazione del venditore 5 su 5 stelle
Taschenbuch. Condizione: Neu. This item is printed on demand - it takes 3-4 days longer - Neuware -Approximate computation provide alternate solution to reduce energy consumption of high performance present day DSP application devices. Conventional multiplication and addition techniques consume a lot of energy. In this brief design of approximate arithmetic units for signal processing application is explored. First an approximate adder is proposed by changing the logic of basic full adder cell. The proposed adder cell has fewer transistor count compared to recent similar approach. Next, an approximate multiplier with low error is designed using lead one detection and selecting n/2 bits for an n bit input. The proposed n/2 bit approximate multiplier performs well in terms of error and power performance compared to recent similar approach. In continuation the approximate units are implemented in a Multiply-Accumulate(MAC) unit. The proposed approximate MAC unit provides significant improvement in power, area, and delay at the cost of little degrade in accuracy. Finally, the proposed MAC unit is implemented in filtering application to verify the functionality. 60 pp. Englisch. Codice articolo 9783330331792
Compra nuovo
EUR 35,90
Spedizione EUR 23,00
Spedito da Germania a U.S.A.
Spedito da Germania a U.S.A.
Quantità: 2 disponibili
Immagini fornite dal venditore
CMOS Area Efficient Approximate Arithmetic Architectures
Editore:
LAP LAMBERT Academic Publishing, 2017
ISBN 10: 3330331798
ISBN 13: 9783330331792
Nuovo
Brossura
Da: moluna, Greven, Germania
Valutazione del venditore 5 su 5 stelle
Condizione: New. Dieser Artikel ist ein Print on Demand Artikel und wird nach Ihrer Bestellung fuer Sie gedruckt. Autor/Autorin: Krishnasamy Natarajan VijeyakumarK.N.Vijeyakumar has completed his ME in Applied Electronics at GCT, Coimbatore. He has completed his research in CMOS Processor Design for Signal and Image Processing Applications. He has published re. Codice articolo 154889620
Compra nuovo
EUR 31,27
Spedizione EUR 48,99
Spedito da Germania a U.S.A.
Spedito da Germania a U.S.A.
Quantità: Più di 20 disponibili
Immagini fornite dal venditore
CMOS Area Efficient Approximate Arithmetic Architectures
Editore:
LAP LAMBERT Academic Publishing Jun 2017, 2017
ISBN 10: 3330331798
ISBN 13: 9783330331792
Nuovo
Taschenbuch
Da: buchversandmimpf2000, Emtmannsberg, BAYE, Germania
Valutazione del venditore 5 su 5 stelle
Taschenbuch. Condizione: Neu. This item is printed on demand - Print on Demand Titel. Neuware -Approximate computation provide alternate solution to reduce energy consumption of high performance present day DSP application devices. Conventional multiplication and addition techniques consume a lot of energy. In this brief design of approximate arithmetic units for signal processing application is explored. First an approximate adder is proposed by changing the logic of basic full adder cell. The proposed adder cell has fewer transistor count compared to recent similar approach. Next, an approximate multiplier with low error is designed using lead one detection and selecting n/2 bits for an n bit input. The proposed n/2 bit approximate multiplier performs well in terms of error and power performance compared to recent similar approach. In continuation the approximate units are implemented in a Multiply-Accumulate(MAC) unit. The proposed approximate MAC unit provides significant improvement in power, area, and delay at the cost of little degrade in accuracy. Finally, the proposed MAC unit is implemented in filtering application to verify the functionality.VDM Verlag, Dudweiler Landstraße 99, 66123 Saarbrücken 60 pp. Englisch. Codice articolo 9783330331792
Compra nuovo
EUR 35,90
Spedizione EUR 60,00
Spedito da Germania a U.S.A.
Spedito da Germania a U.S.A.
Quantità: 1 disponibili
Immagini fornite dal venditore
CMOS Area Efficient Approximate Arithmetic Architectures
Editore:
LAP LAMBERT Academic Publishing, 2017
ISBN 10: 3330331798
ISBN 13: 9783330331792
Nuovo
Taschenbuch
Da: AHA-BUCH GmbH, Einbeck, Germania
Valutazione del venditore 5 su 5 stelle
Taschenbuch. Condizione: Neu. nach der Bestellung gedruckt Neuware - Printed after ordering - Approximate computation provide alternate solution to reduce energy consumption of high performance present day DSP application devices. Conventional multiplication and addition techniques consume a lot of energy. In this brief design of approximate arithmetic units for signal processing application is explored. First an approximate adder is proposed by changing the logic of basic full adder cell. The proposed adder cell has fewer transistor count compared to recent similar approach. Next, an approximate multiplier with low error is designed using lead one detection and selecting n/2 bits for an n bit input. The proposed n/2 bit approximate multiplier performs well in terms of error and power performance compared to recent similar approach. In continuation the approximate units are implemented in a Multiply-Accumulate(MAC) unit. The proposed approximate MAC unit provides significant improvement in power, area, and delay at the cost of little degrade in accuracy. Finally, the proposed MAC unit is implemented in filtering application to verify the functionality. Codice articolo 9783330331792
Compra nuovo
EUR 35,90
Spedizione EUR 60,54
Spedito da Germania a U.S.A.
Spedito da Germania a U.S.A.
Quantità: 1 disponibili
Foto dell'editore
CMOS Area Efficient Approximate Arithmetic Architectures
Editore:
LAP LAMBERT Academic Publishing, 2017
ISBN 10: 3330331798
ISBN 13: 9783330331792
Nuovo
paperback
Da: Mispah books, Redhill, SURRE, Regno Unito
Valutazione del venditore 4 su 5 stelle
paperback. Condizione: New. NEW. SHIPS FROM MULTIPLE LOCATIONS. book. Codice articolo ERICA82933303317986
Compra nuovo
EUR 136,29
Spedizione EUR 29,54
Spedito da Regno Unito a U.S.A.
Spedito da Regno Unito a U.S.A.
Quantità: 1 disponibili