Transactional memory (TM), a new programming paradigm, is one of the latest approaches to write programs for next generation multicore and multiprocessor systems. TM is an alternative to lock-based programming. It is a promising solution to a hefty and mounting problem that programmers are facing in developing programs for Chip Multi-Processor (CMP) architectures by simplifying synchronization to shared data structures in a way that is scalable and compos-able. Software Transactional Memory (STM) a full software approach of TM systems can be defined as non-blocking synchronization mechanism where sequential objects are automatically converted into concurrent objects. In this work, we present performance comparison of four different STM implementations – RSTM of V. J. Marathe, et al., TL2 of D. Dice, et al., TinySTM of P. Felber, et al. and SwissTM of A. Dragojevic, et al. It helps us in deep understanding of potential tradeoffs involved.
Le informazioni nella sezione "Riassunto" possono far riferimento a edizioni diverse di questo titolo.
Da: BuchWeltWeit Ludwig Meier e.K., Bergisch Gladbach, Germania
Taschenbuch. Condizione: Neu. This item is printed on demand - it takes 3-4 days longer - Neuware -Transactional memory (TM), a new programming paradigm, is one of the latest approaches to write programs for next generation multicore and multiprocessor systems. TM is an alternative to lock-based programming. It is a promising solution to a hefty and mounting problem that programmers are facing in developing programs for Chip Multi-Processor (CMP) architectures by simplifying synchronization to shared data structures in a way that is scalable and compos-able. Software Transactional Memory (STM) a full software approach of TM systems can be defined as non-blocking synchronization mechanism where sequential objects are automatically converted into concurrent objects. In this work, we present performance comparison of four different STM implementations - RSTM of V. J. Marathe, et al., TL2 of D. Dice, et al., TinySTM of P. Felber, et al. and SwissTM of A. Dragojevic, et al. It helps us in deep understanding of potential tradeoffs involved. 60 pp. Englisch. Codice articolo 9783659918056
Quantità: 2 disponibili
Da: Books Puddle, Woodside, NY, U.S.A.
Condizione: New. Codice articolo 26404348562
Quantità: 4 disponibili
Da: Majestic Books, Hounslow, Regno Unito
Condizione: New. Print on Demand. Codice articolo 409887053
Quantità: 4 disponibili
Da: Biblios, Frankfurt am main, HESSE, Germania
Condizione: New. PRINT ON DEMAND. Codice articolo 18404348568
Quantità: 4 disponibili
Da: Revaluation Books, Exeter, Regno Unito
Paperback. Condizione: Brand New. 60 pages. 8.66x5.91x0.14 inches. In Stock. Codice articolo 3659918059
Quantità: 1 disponibili
Da: moluna, Greven, Germania
Condizione: New. Dieser Artikel ist ein Print on Demand Artikel und wird nach Ihrer Bestellung fuer Sie gedruckt. Autor/Autorin: Asif NaveedNaveed Asif - School of Computing, Blekinge Institute of Technology, Sweden.Transactional memory (TM), a new programming paradigm, is one of the latest approaches to write programs for next generation multicore and mul. Codice articolo 385770771
Quantità: Più di 20 disponibili
Da: buchversandmimpf2000, Emtmannsberg, BAYE, Germania
Taschenbuch. Condizione: Neu. This item is printed on demand - Print on Demand Titel. Neuware -Transactional memory (TM), a new programming paradigm, is one of the latest approaches to write programs for next generation multicore and multiprocessor systems. TM is an alternative to lock-based programming. It is a promising solution to a hefty and mounting problem that programmers are facing in developing programs for Chip Multi-Processor (CMP) architectures by simplifying synchronization to shared data structures in a way that is scalable and compos-able. Software Transactional Memory (STM) a full software approach of TM systems can be defined as non-blocking synchronization mechanism where sequential objects are automatically converted into concurrent objects. In this work, we present performance comparison of four different STM implementations - RSTM of V. J. Marathe, et al., TL2 of D. Dice, et al., TinySTM of P. Felber, et al. and SwissTM of A. Dragojevic, et al. It helps us in deep understanding of potential tradeoffs involved.VDM Verlag, Dudweiler Landstraße 99, 66123 Saarbrücken 60 pp. Englisch. Codice articolo 9783659918056
Quantità: 1 disponibili
Da: AHA-BUCH GmbH, Einbeck, Germania
Taschenbuch. Condizione: Neu. nach der Bestellung gedruckt Neuware - Printed after ordering - Transactional memory (TM), a new programming paradigm, is one of the latest approaches to write programs for next generation multicore and multiprocessor systems. TM is an alternative to lock-based programming. It is a promising solution to a hefty and mounting problem that programmers are facing in developing programs for Chip Multi-Processor (CMP) architectures by simplifying synchronization to shared data structures in a way that is scalable and compos-able. Software Transactional Memory (STM) a full software approach of TM systems can be defined as non-blocking synchronization mechanism where sequential objects are automatically converted into concurrent objects. In this work, we present performance comparison of four different STM implementations - RSTM of V. J. Marathe, et al., TL2 of D. Dice, et al., TinySTM of P. Felber, et al. and SwissTM of A. Dragojevic, et al. It helps us in deep understanding of potential tradeoffs involved. Codice articolo 9783659918056
Quantità: 1 disponibili
Da: preigu, Osnabrück, Germania
Taschenbuch. Condizione: Neu. Performance Tradeoffs in Software Transactional Memory | Naveed Asif | Taschenbuch | 60 S. | Englisch | 2019 | LAP LAMBERT Academic Publishing | EAN 9783659918056 | Verantwortliche Person für die EU: preigu GmbH & Co. KG, Lengericher Landstr. 19, 49078 Osnabrück, mail[at]preigu[dot]de | Anbieter: preigu. Codice articolo 117344133
Quantità: 5 disponibili