Articoli correlati a Berkeley RISC: Reduced instruction set computing, Microproce...

Berkeley RISC: Reduced instruction set computing, Microprocessor, ARPA, VLSI Project, MIPS architecture, Motorola 68000, Compiler, Register, Unix - Brossura

 
9786131789946: Berkeley RISC: Reduced instruction set computing, Microprocessor, ARPA, VLSI Project, MIPS architecture, Motorola 68000, Compiler, Register, Unix
Brossura
ISBN 10: 6131789940 ISBN 13: 9786131789946
Casa editrice: Alphascript Publishing, 2010

Sinossi

Please note that the content of this book primarily consists of articles available from Wikipedia or other free sources online. Berkeley RISC was one of two seminal research projects into RISC-based microprocessor design taking place under ARPA''s VLSI project. RISC was led by David Patterson at the University of California, Berkeley between 1980 and 1984, while the other was taking place only a short drive away at Stanford University under their MIPS effort starting in 1981 and running until 1984. Berkeley''s project was so successful that it became the name for all similar designs to follow, even the MIPS would become known as a RISC processor". The RISC design was later commercialized as the SPARC processor."

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Editore
Alphascript Publishing
Data di pubblicazione
2010
Lingua
Inglese
ISBN 10 
6131789940
ISBN 13 
9786131789946
Rilegatura
Copertina flessibile
Numero di pagine
100
Redattore
Miller Frederic P., Vandome Agnes F., McBrewster John
Contatto del produttore
non disponibile
Persona responsabile
non disponibile