Guide to FPGA Implementation of Arithmetic Functions: 149 - Brossura

Deschamps, Jean-Pierre; Sutter, Gustavo D.; Cantó, Enrique

Brossura

ISBN 10: 9401784388 ISBN 13: 9789401784382

Casa editrice: Springer, 2014

Riassunto

This book is designed both for FPGA users interested in developing new, specific components - generally for reducing execution times –and IP core designers interested in extending their catalog of specific components. The main focus is circuit synthesis and the discussion shows, for example, how a given algorithm executing some complex function can be translated to a synthesizable circuit description, as well as which are the best choices the designer can make to reduce the circuit cost, latency, or power consumption. This is not a book on algorithms. It is a book that shows how to translate efficiently an algorithm to a circuit, using techniques such as parallelism, pipeline, loop unrolling, and others. Numerous examples of FPGA implementation are described throughout this book and the circuits are modeled in VHDL. Complete and synthesizable source files are available for download.

Su questo libro

Informazioni sull?autore

Jean-Pierre Deschamps received an MS degree in electrical engineering from the University of Louvain, Belgium, in 1967, the PhD in computer science from the Autonomous University of Barcelona, Spain, in 1983, and a PhD degree in electrical engineering from the Polytechnic School of Lausanne, Switzerland, in 1984. He worked in several companies and universities. He is currently a professor at the University Rovira i Virgili, Tarragona, Spain. His research interests include ASIC and FPGA design, digital arithmetic and cryptography. He is the author of eight books (see the last section) and more than a hundred international papers. Gustavo Sutter received an MS degree in Computer Science from State University UNCPBA of Tandil (Buenos Aires) Argentina, and a PhD degree from the Autonomous University of Madrid, Spain. He has been a professor at the UNCPBA Argentina and is currently a professor at the Autonomous University of Madrid Spain. His research interests include ASIC and FPGA design, digital arithmetic, and development of embedded systems. He is the author of two books and about fifty international papers and communications. Enrique Cantó received an MS degree in electronic engineering (1995) and a PhD in electronic engineering (2001), both from the Polytechnic University of Barcelona, Spain. He has been a professor at the Polytechnic University of Barcelona, Spain, and is currently a professor at the University Rovira i Virgili, Tarragona, Spain. His research interests include ASIC and FPGA design, development of embedded systems, and dynamic reconfiguration of programmable devices. He is the author of about fifty international papers and communications.

Dalla quarta di copertina

This book is designed both for FPGA users interested in developing new, specific components - generally for reducing execution times and IP core designers interested in extending their catalog of specific components. The main focus is circuit synthesis and the discussion shows, for example, how a given algorithm executing some complex function can be translated to a synthesizable circuit description, as well as which are the best choices the designer can make to reduce the circuit cost, latency, or power consumption. This is not a book on algorithms. It is a book that shows how to translate efficiently an algorithm to a circuit, using techniques such as parallelism, pipeline, loop unrolling, and others. Numerous examples of FPGA implementation are described throughout this book and the circuits are modeled in VHDL. Complete and synthesizable source files are available for download.

Dettagli dell?edizione

• Editore: Springer
• Data di pubblicazione: 2014
• Lingua: Inglese
• ISBN 10: 9401784388
• ISBN 13: 9789401784382
• Rilegatura: Copertina flessibile
• Numero di pagine: 488
• Contatto del produttore: non disponibile
• Persona responsabile: CMN Printpool Inh. Mathis Neumann; https://www.also.com/ec/cms5/en_6000/6000/index.jsp; ; Friedrich-Karl-Str. 9; Hamburg; Germania