CMOS Sram Circuit Design and Parametric Test in Nano-Scaled Technologies : Process-Aware Sram Design and Test

Andrei Pavlov

ISBN 10: 1402083629 / ISBN 13: 9781402083624

Editore: Springer Jun 2008, 2008

Riguardo questo articolo

Neuware - CMOS SRAM Circuit Design and Parametric Test in Nano-Scaled Technologies covers a broad range of topics related to SRAM design and test. From SRAM operation basics through cell electrical and physical design to process-aware and economical approach to SRAM testing. The emphasis of the book is on challenges and solutions of stability testing as well as on development of understanding of the link between the process technology and SRAM circuit design in modern nano-scaled technologies.

Codice articolo 9781402083624

Dati bibliografici

• Titolo: CMOS Sram Circuit Design and Parametric Test in Nano-Scaled Technologies : Process-Aware Sram Design and Test
• Editore: Springer Jun 2008
• Data di pubblicazione: 2008
• Lingua: Inglese
• ISBN 10: 1402083629
• ISBN 13: 9781402083624
• Rilegatura: Buch
• Condizione: Neu
• Dimensioni: 242 L x 166 A x 19 P (millimetri) 242 millimetri di larghezza per 166 millimetri di altezza per 19 millimetri di profondità
• Peso: 445 grammi

Descrizione articolo

Riassunto

The monograph will be dedicated to SRAM (memory) design and test issues in nano-scaled technologies by adapting the cell design and chip design considerations to the growing process variations with associated test issues. Purpose: provide process-aware solutions for SRAM design and test challenges.

Informazioni sull?autore

Prof. Sachdev has authored several successful books with Springer