Clock Generators for SOC Processors (Hardcover)

Amr Fahim

ISBN 10: 1402080794 / ISBN 13: 9781402080791

Editore: Springer-Verlag New York Inc., New York, NY, 2005

Riguardo questo articolo

Hardcover. Clock Generators for SOC Processors - Circuits and Architectures examines the issue of design of fully-integrated frequency synthesizers suitable for system-on-a-chip (SOC) processors. This book takes a more global design perspective in jointly examining the design space at the circuit level as well as at the architectural level. The coverage of the book is comprehensive and includes chapters on circuit theory as well as feedback control theory relevant to the operation of phase locked loops (PLLs). On the circuit level, the discussion includes low-voltage analog design in deep submicron digital CMOS processes, effects of supply noise, substrate noise, as well device noise. On the architectural level, the discussion includes PLL analysis using continuous-time as well as discrete-time models, linear and nonlinear effects of PLL performance, and detailed analysis of locking behavior. Clock Generators for SOC Processors - Circuits and Architectures provides numerous real world applications, as well as practical rules-of-thumb for modern designers to use at the system, architectural, as well as the circuit level.It is well suited for practitioners as well as graduate level students who wish to learn more about time-domain analysis and design of frequency synthesis techniques. On the architectural level, the discussion includes PLL analysis using continuous-time as well as discre- time models, linear and nonlinear effects of PLL performance, and detailed analysis of locking behavior. Shipping may be from multiple locations in the US or from the UK, depending on stock availability.

Codice articolo 9781402080791

Dati bibliografici

• Titolo: Clock Generators for SOC Processors (Hardcover)
• Editore: Springer-Verlag New York Inc., New York, NY
• Data di pubblicazione: 2005
• Lingua: Inglese
• ISBN 10: 1402080794
• ISBN 13: 9781402080791
• Rilegatura: Hardcover
• Condizione: new

Descrizione articolo

Riassunto

This book examines the issue of design of fully integrated frequency synthesizers suitable for system-on-a-chip (SOC) processors. This book takes a more global design perspective in jointly examining the design space at the circuit level as well as at the architectural level. The coverage of the book is comprehensive and includes summary chapters on circuit theory as well as feedback control theory relevant to the operation of phase locked loops (PLLs). On the circuit level, the discussion includes low-voltage analog design in deep submicron digital CMOS processes, effects of supply noise, substrate noise, as well device noise. On the architectural level, the discussion includes PLL analysis using continuous-time as well as discre- time models, linear and nonlinear effects of PLL performance, and detailed analysis of locking behavior. The material then develops into detailed circuit and architectural analysis of specific clock generation blocks. This includes circuits and architectures of PLLs with high power supply noise immunity and digital PLL architectures where the loop filter is digitized. Methods of generating low-spurious sampling clocks for discrete-time analog blocks are then examined. This includes sigma-delta fractional-N PLLs, Direct Digital Synthesis (DDS) techniques and non-conventional uses of PLLs. Design for test (DFT) issues as they arise in PLLs are then discussed. This includes methods of accurately measuring jitter and built-in-self-test (BIST) techniques for PLLs.

Informazioni sull?autore

Amr M. Fahim received his B.A.Sc, M.A.Sc, and Ph.D degrees from the University of Waterloo in Computer Engineering in 1996 and Electrical Engineering in 1997 and 2000, respectively. In 2000 he joined Qualcomm Inc., where he is currently working on the development of mixed-signal designs.  He is the author of over 20 papers and 5 patents in this area, and has been a reviewer for the IEEE Journal of Solid-State Circuits and IEEE Transactions on Circuits and Systems II.