Constraint-Based Verification (Hardcover)
Jun Yuan
Venduto da AussieBookSeller, Truganina, VIC, Australia
Venditore AbeBooks dal 22 giugno 2007
Nuovi - Rilegato
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Aggiungere al carrelloVenduto da AussieBookSeller, Truganina, VIC, Australia
Venditore AbeBooks dal 22 giugno 2007
Condizione: Nuovo
Quantità: 1 disponibili
Aggiungere al carrelloHardcover. Constraint-Based Verification covers an emerging field in functional verification of electronic designs, referred to as the "constraint-based verification." The topics are developed in the context of a wide range of dynamic and static verification approaches including simulation, emulation, and formal methods. The goal is to show how constraints, or assertions, can be used towards automating the generation of testbenches, resulting in a seamless verification flow. Topics such as verification coverage, and connection with assertion based verification, are also covered.The book targets verification engineers as well as researchers. It covers both methodological and technical issues. Particular stress is given to the latest advances in functional verification.The research community has witnessed recent growth of interests in constraint-based functional verification. Various techniques have been developed. They are relatively new, but have reached a level of maturity so that they are appearing in commercial tools such as Vera and System Verilog. Constraint-Based Verification covers an emerging field in functional verification of electronic designs, referred to as the "constraint-based verification." Topics such as verification coverage, and connection with assertion based verification, are also covered.The book targets verification engineers as well as researchers. Shipping may be from our Sydney, NSW warehouse or from our UK or US warehouse, depending on stock availability.
Codice articolo 9780387259475
Constraint-Based Verification covers an emerging field in functional verification of electronic designs, referred to as the "constraint-based verification." The topics are developed in the context of a wide range of dynamic and static verification approaches including simulation, emulation, and formal methods. The goal is to show how constraints, or assertions, can be used towards automating the generation of testbenches, resulting in a seamless verification flow. Topics such as verification coverage, and connection with assertion based verification, are also covered.
The book targets verification engineers as well as researchers. It covers both methodological and technical issues. Particular stress is given to the latest advances in functional verification.
The research community has witnessed recent growth of interests in constraint-based functional verification. Various techniques have been developed. They are relatively new, but have reached a level of maturity so that they are appearing in commercial tools such as Vera and System Verilog.
Constraint-Based Verifcation covers the emerging field in functional verification of electronic designs thats is now commonly referred to by this name.
Topics are developed in the context of a wide range of dynamic and static verification approaches including stimulation, emulation and formal methods. The goal is to show how constraints, or assertions, can be used toward automating the generation of testbenches, resulting in a seamless verifcation flow. Topics such as verification coverage, and connection with assertion-based verification are also covered.
Constraint-Based Verification is written for verification engineers, as well as researchers - it explains both methodological and technical issues. Particular stress is given to the latest advances in functional verification.
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