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In English. Codice articolo ria9783031006203_new
Since the end of Dennard scaling in the early 2000s, improving the energy efficiency of computation has been the main concern of the research community and industry. The large energy efficiency gap between general-purpose processors and application-specific integrated circuits (ASICs) motivates the exploration of customizable architectures, where one can adapt the architecture to the workload. In this Synthesis lecture, we present an overview and introduction of the recent developments on energy-efficient customizable architectures, including customizable cores and accelerators, on-chip memory customization, and interconnect optimization. In addition to a discussion of the general techniques and classification of different approaches used in each area, we also highlight and illustrate some of the most successful design examples in each category and discuss their impact on performance and energy efficiency. We hope that this work captures the state-of-the-art research and development oncustomizable architectures and serves as a useful reference basis for further research, design, and implementation for large-scale deployment in future computing systems.
Informazioni sull?autore: Yu-Ting Chen is a Ph.D. candidate in the Computer Science Department at the University of California, Los Angeles. He received a B.S. degree in computer science, a B.A. degree in economics, and an M.S. degree in computer science from National Tsing Hua University, HsinTsu, Taiwan, R.O.C., in 2005 and 2007, respectively. He worked at TSMC as a summer intern in 2005 and at Intel Labs as a summer intern in 2013. His research interests include computer architecture, cluster computing, and bioinformatics in DNA sequencing technologies.
Titolo: Customizable Computing (Synthesis Lectures ...
Casa editrice: Springer
Data di pubblicazione: 2015
Legatura: Brossura
Condizione: New
Da: moluna, Greven, Germania
Condizione: New. Dieser Artikel ist ein Print on Demand Artikel und wird nach Ihrer Bestellung fuer Sie gedruckt. Since the end of Dennard scaling in the early 2000s, improving the energy efficiency of computation has been the main concern of the research community and industry. The large energy efficiency gap between general-purpose processors and application-specific. Codice articolo 608129035
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Da: preigu, Osnabrück, Germania
Taschenbuch. Condizione: Neu. Customizable Computing | Yu-Ting Chen (u. a.) | Taschenbuch | xi | Englisch | 2015 | Springer International Publishing | EAN 9783031006203 | Verantwortliche Person für die EU: Springer Verlag GmbH, Tiergartenstr. 17, 69121 Heidelberg, juergen[dot]hartmann[at]springer[dot]com | Anbieter: preigu. Codice articolo 121975101
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Taschenbuch. Condizione: Neu. Neuware -Since the end of Dennard scaling in the early 2000s, improving the energy efficiency of computation has been the main concern of the research community and industry. The large energy efficiency gap between general-purpose processors and application-specific integrated circuits (ASICs) motivates the exploration of customizable architectures, where one can adapt the architecture to the workload. In this Synthesis lecture, we present an overview and introduction of the recent developments on energy-efficient customizable architectures, including customizable cores and accelerators, on-chip memory customization, and interconnect optimization. In addition to a discussion of the general techniques and classification of different approaches used in each area, we also highlight and illustrate some of the most successful design examples in each category and discuss their impact on performance and energy efficiency. We hope that this work captures the state-of-the-art research and development oncustomizable architectures and serves as a useful reference basis for further research, design, and implementation for large-scale deployment in future computing systems.Springer Verlag GmbH, Tiergartenstr. 17, 69121 Heidelberg 120 pp. Englisch. Codice articolo 9783031006203
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Da: BuchWeltWeit Ludwig Meier e.K., Bergisch Gladbach, Germania
Taschenbuch. Condizione: Neu. This item is printed on demand - it takes 3-4 days longer - Neuware -Since the end of Dennard scaling in the early 2000s, improving the energy efficiency of computation has been the main concern of the research community and industry. The large energy efficiency gap between general-purpose processors and application-specific integrated circuits (ASICs) motivates the exploration of customizable architectures, where one can adapt the architecture to the workload. In this Synthesis lecture, we present an overview and introduction of the recent developments on energy-efficient customizable architectures, including customizable cores and accelerators, on-chip memory customization, and interconnect optimization. In addition to a discussion of the general techniques and classification of different approaches used in each area, we also highlight and illustrate some of the most successful design examples in each category and discuss their impact on performance and energy efficiency. We hope that this work captures the state-of-the-art research and development on customizable architectures and serves as a useful reference basis for further research, design, and implementation for large-scale deployment in future computing systems. 120 pp. Englisch. Codice articolo 9783031006203
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Da: AHA-BUCH GmbH, Einbeck, Germania
Taschenbuch. Condizione: Neu. Druck auf Anfrage Neuware - Printed after ordering - Since the end of Dennard scaling in the early 2000s, improving the energy efficiency of computation has been the main concern of the research community and industry. The large energy efficiency gap between general-purpose processors and application-specific integrated circuits (ASICs) motivates the exploration of customizable architectures, where one can adapt the architecture to the workload. In this Synthesis lecture, we present an overview and introduction of the recent developments on energy-efficient customizable architectures, including customizable cores and accelerators, on-chip memory customization, and interconnect optimization. In addition to a discussion of the general techniques and classification of different approaches used in each area, we also highlight and illustrate some of the most successful design examples in each category and discuss their impact on performance and energy efficiency. We hope that this work captures the state-of-the-art research and development oncustomizable architectures and serves as a useful reference basis for further research, design, and implementation for large-scale deployment in future computing systems. Codice articolo 9783031006203
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