Digital System Verification : A Combined Formal Methods and Simulation Framework

Lingua: inglese

Editore: Springer, 2010

3031798147 / 9783031798146

Da: AHA-BUCH GmbH, Einbeck, GermaniaAHA-BUCH GmbH

Venditore con 5 stelle

Venditore AbeBooks dal 14 agosto 2006

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Druck auf Anfrage Neuware - Printed after ordering - Integrated circuit capacity follows Moore's law, and chips are commonly produced at the time of this writing with over 70 million gates per device. Ensuring correct functional behavior of such large designs before fabrication poses an extremely challenging problem. Formal verification validates the correctness of the implementation of a design with respect to its specification through mathematical proof techniques. Formal techniques have been emerging as commercialized EDA tools in the past decade. Simulation remains a predominantly used tool to validate a design in industry. After more than 50 years of development, simulation methods have reached a degree of maturity, however, new advances continue to be developed in the area. A simulation approach for functional verification can theoretically validate all possible behaviors of a design but requires excessive computational resources. Rapidly evolving markets demand short design cycles while the increasing complexity of a design causes simulation approaches to provide less and less coverage. Formal verification is an attractive alternative since 100% coverage can be achieved; however, large designs impose unrealistic computational requirements. Combining formal verification and simulation into a single integrated circuit validation framework is an attractive alternative.This book focuses on an Integrated Design Validation (IDV) system that provides a framework for design validation and takes advantage of current technology in the areas of simulation and formal verification resulting in a practical validation engine with reasonable runtime. After surveying the basic principles of formal verification and simulation, this book describes the IDV approach to integrated circuit functional validation.Table of Contents: Introduction / Formal Methods Background / Simulation Approaches / Integrated Design Validation System/ Conclusion and Summary.

Codice articolo 9783031798146

Titolo
Digital System Verification : A Combined Formal Methods and Simulation Framework
Autore
Mitchel Thornton
Editore
Springer
Anno di pubblicazione
2010
Condizione
Neu
Rilegatura
Taschenbuch
Lingua
inglese
ISBN 10
3031798147
ISBN 13
9783031798146
Peso dell'articolo
197 grammi
Dimensioni
235x191x6 mm

AHA-BUCH GmbH

Einbeck, Germania

Venditore con 5 stelle

Venditore AbeBooks dal 14 agosto 2006

Tariffe di spedizione da Germania a U.S.A.

ArticoloDa 7 a 10 giorni lavorativiDa 5 a 7 giorni lavorativi
Primo articoloEUR 35,00EUR 45,00
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