Digital VLSI Chip Design with Cadence and Synopsys CAD Tools

Erik Brunvand

ISBN 10: 0321547993 / ISBN 13: 9780321547996

Editore: Pearson Addison Wesley Prof Feb 2009, 2009

Riguardo questo articolo

Neuware - Digital VLSI Chip Design with Cadence and Synopsys CAD Tools leads students through the complete process of building a ready-to-fabricate CMOS integrated circuit using popular commercial design software. Detailed tutorials include step-by-step instructions and screen shots of tool windows and dialog boxes. This hands-on book is for use in conjunction with a primary textbook on digital VLSI.

Codice articolo 9780321547996

Dati bibliografici

• Titolo: Digital VLSI Chip Design with Cadence and Synopsys CAD Tools
• Editore: Pearson Addison Wesley Prof Feb 2009
• Data di pubblicazione: 2009
• Lingua: Inglese
• ISBN 10: 0321547993
• ISBN 13: 9780321547996
• Rilegatura: Taschenbuch
• Condizione: Neu
• Dimensioni: 241 L x 190 A x 27 P (millimetri) 241 millimetri di larghezza per 190 millimetri di altezza per 27 millimetri di profondità
• Peso: 883 grammi

Descrizione articolo

Riassunto

KEY BENEFIT: This hands-on book leads readers through the complete process of building a ready-to-fabricate CMOS integrated circuit using popular commercial design software. KEY TOPICS: The VLSI CAD flow described in this book uses tools from two vendors: Cadence Design Systems, Inc. and Synopsys Inc. Detailed tutorials include step-by-step instructions and screen shots of tool windows and dialog boxes. MARKET: A useful reference for chip designers.

Informazioni sull?autore

Professor Erik Brunvand is an associate professor in the School of Computing at the University of Utah. He has interests in computer architecture and VLSI systems in general, and self-timed and asynchronous systems in particular. One aspect of his research involves compiling concurrent communicating programs into asynchronous VLSI circuits. The current system allows programs written in a subset of occam, a concurrent message-passing programming language based on CSP, to be automatically compiled into a set of self-timed circuit modules suitable for manufacture as an integrated circuit. He is also interested in investigating the effects of asynchrony on computer systems architecture at a higher level. To explore these ideas he is building a series of prototype asynchronous computer systems out of FPGA and custom VLSI chips.