Embedded Memory Design for Multi-Core and Systems on Chip

Baker Mohammad

ISBN 10: 1493948016 / ISBN 13: 9781493948017

Editore: Springer New York, 2016

Riguardo questo articolo

Druck auf Anfrage Neuware - Printed after ordering - This book describes the various tradeoffs systems designers face when designing embedded memory. Readers designing multi-core systems and systems on chip will benefit from the discussion of different topics from memory architecture, array organization, circuit design techniques and design for test. The presentation enables a multi-disciplinary approach to chip design, which bridges the gap between the architecture level and circuit level, in order to address yield, reliability and power-related issues for embedded memory.

Codice articolo 9781493948017

Dati bibliografici

• Titolo: Embedded Memory Design for Multi-Core and Systems on Chip
• Editore: Springer New York
• Data di pubblicazione: 2016
• Lingua: Inglese
• ISBN 10: 1493948016
• ISBN 13: 9781493948017
• Rilegatura: Taschenbuch
• Condizione: Neu
• Dimensioni: 234 L x 156 A x 6 P (millimetri) 234 millimetri di larghezza per 156 millimetri di altezza per 6 millimetri di profondità
• Peso: 168 grammi

Descrizione articolo

Riassunto

This book describes the various tradeoffs systems designers face when designing embedded memory. Readers designing multi-core systems and systems on chip will benefit from the discussion of different topics from memory architecture, array organization, circuit design techniques and design for test. The presentation enables a multi-disciplinary approach to chip design, which bridges the gap between the architecture level and circuit level, in order to address yield, reliability and power-related issues for embedded memory.

Dalla quarta di copertina

This book describes the various tradeoffs systems designers face when designing embedded memory. Readers designing multi-core systems and systems on chip will benefit from the discussion of different topics from memory architecture, array organization, circuit design techniques and design for test. The presentation enables a multi-disciplinary approach to chip design, which bridges the gap between the architecture level and circuit level, in order to address yield, reliability and power-related issues for embedded memory.

· Provides a comprehensive overview of embedded memory design and associated challenges and choices;

· Explains tradeoffs and dependencies across different disciplines involved with multi-core and system on chip memory design;

· Includes detailed discussion of memory hierarchy and its impact on energy and performance;

· Uses real product examples to demonstrate embedded memory design flow from architecture, to circuit design, design for test and yield analysis.