FPGA Implementation of Advanced Encryption Standard Algorithm | AES Encryption and Decryption Using 128,192 and 256-Bit Keys. Questo articolo non è disponibile.
Lingua: inglese
Editore: LAP LAMBERT Academic Publishing, 2012
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Descrizione dell’articolo da parte del venditore
FPGA Implementation of Advanced Encryption Standard Algorithm | AES Encryption and Decryption Using 128,192 and 256-Bit Keys | Leelarani Vanapalli | Taschenbuch | 64 S. | Englisch | 2012 | LAP LAMBERT Academic Publishing | EAN 9783659164552 | Verantwortliche Person für die EU: preigu GmbH & Co. KG, Lengericher Landstr. 19, 49078 Osnabrück, mail[at]preigu[dot]de | Anbieter: preigu.
Codice articolo 106406715
- Titolo
- FPGA Implementation of Advanced Encryption Standard Algorithm | AES Encryption and Decryption Using 128,192 and 256-Bit Keys
- Autore
- Leelarani Vanapalli
- Editore
- LAP LAMBERT Academic Publishing
- Anno di pubblicazione
- 2012
- Condizione
- Neu
- Rilegatura
- Taschenbuch
- Lingua
- inglese
- ISBN 10
- 3659164550
- ISBN 13
- 9783659164552
- Peso dell'articolo
- 113 grammi
- Dimensioni
- 220 x 150 x 5 mm
- Cataloghi dei venditori
- Bücher
‘DATA’ has an important role in the modern world.With the increasing use of computers in a wide range of applications, the amount of data being processed and operated on had increased tremendously over the years. At the same time protection of data during transmission or while in storage may be necessary to maintain the confidentiality and integrity of the information represented by the data. In applications such as storage and transmission of Federal Information, ATM’s and in the Internet there is a lot of emphasis for Data Security. This led to the origin of a new field called ‘Cryptography’ which deals with the DATA and its security.Public key and secret key cryptographic algorithms provide a solution to this security problem.They ensure data authenticity, integrity and confidentiality. The most widely used secret key algorithm at present is Advanced Encryption Standard(AES) Algorithm.AES was considered over, all the other encryption algorithms because of its increased security levels. The work presented in this book deals with the hardware implementation of the AES algorithm which includes writing a Verilog HDL code for the algorithm and synthesizing it on the FPGA board.
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Informazioni sull’autore
V. Leela Rani received B.E degree in ECE from Andhra University and M.Tech degree in Digital Systems and Computer Electronics from JNTU College of Engineering, Hyderabad.She has 10 years of teaching experience and is Associate Professor of ECE Department,G.V.P.College of Engineering, Visakhapatnam,AP,India.Her research includes Analog&Digital VLSI.
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