Functional Design Errors in Digital Circuits

Kai-Hui Chang

ISBN 10: 9048181127 / ISBN 13: 9789048181124

Editore: Springer Netherlands, Springer Netherlands Okt 2010, 2010

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This item is printed on demand - Print on Demand Titel. Neuware -Functional Design Errors in Digital Circuits Diagnosis covers a wide spectrum of innovative methods to automate the debugging process throughout the design flow: from Register-Transfer Level (RTL) all the way to the silicon die. In particular, this book describes: (1) techniques for bug trace minimization that simplify debugging; (2) an RTL error diagnosis method that identifies the root cause of errors directly; (3) a counterexample-guided error-repair framework to automatically fix errors in gate-level and RTL designs; (4) a symmetry-based rewiring technology for fixing electrical errors; (5) an incremental verification system for physical synthesis; and (6) an integrated framework for post-silicon debugging and layout repair. The solutions provided in this book can greatly reduce debugging effort, enhance design quality, and ultimately enable the design and manufacture of more reliable electronic devices.Springer Verlag GmbH, Tiergartenstr. 17, 69121 Heidelberg 224 pp. Englisch.

Codice articolo 9789048181124

Dati bibliografici

• Titolo: Functional Design Errors in Digital Circuits
• Editore: Springer Netherlands, Springer Netherlands Okt 2010
• Data di pubblicazione: 2010
• Lingua: Inglese
• ISBN 10: 9048181127
• ISBN 13: 9789048181124
• Rilegatura: Taschenbuch
• Condizione: Neu
• Dimensioni: 235 L x 155 A x 13 P (millimetri) 235 millimetri di larghezza per 155 millimetri di altezza per 13 millimetri di profondità
• Peso: 347 grammi

Descrizione articolo

Riassunto

Functional Design Errors in Digital Circuits Diagnosis covers a wide spectrum of innovative methods to automate the debugging process throughout the design flow: from Register-Transfer Level (RTL) all the way to the silicon die. In particular, this book describes: (1) techniques for bug trace minimization that simplify debugging; (2) an RTL error diagnosis method that identifies the root cause of errors directly; (3) a counterexample-guided error-repair framework to automatically fix errors in gate-level and RTL designs; (4) a symmetry-based rewiring technology for fixing electrical errors; (5) an incremental verification system for physical synthesis; and (6) an integrated framework for post-silicon debugging and layout repair. The solutions provided in this book can greatly reduce debugging effort, enhance design quality, and ultimately enable the design and manufacture of more reliable electronic devices.

Informazioni sull?autore

Winner of the EDAA (European Design Automation Association) Outstanding Monograph Award in the Verification section. Co-authors Bertacco and Markov are existing Springer authors