Heterogeneous Reconfigurable Processors for Real-Time Baseband Processing: From Algorithm to Architecture

Zhang, Chenxin, Liu, Liang, Öwall, Viktor

ISBN 10: 3319240021 / ISBN 13: 9783319240022

Editore: Springer, 2016

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Codice articolo ERICA77333192400216

Dati bibliografici

• Titolo: Heterogeneous Reconfigurable Processors for Real-Time Baseband Processing: From Algorithm to Architecture
• Editore: Springer
• Data di pubblicazione: 2016
• Lingua: Inglese
• ISBN 10: 3319240021
• ISBN 13: 9783319240022
• Rilegatura: Hardcover
• Condizione: Like New
• Tipo di libro: book

Descrizione articolo

Riassunto

This book focuses on domain-specific heterogeneous reconfigurable architectures, demonstrating for readers a computing platform which is flexible enough to support multiple standards, multiple modes, and multiple algorithms. The content is multi-disciplinary, covering areas of wireless communication, computing architecture, and circuit design. The platform described provides real-time processing capability with reasonable implementation cost, achieving balanced trade-offs among flexibility, performance, and hardware costs. The authors discuss efficient design methods for wireless communication processing platforms, from both an algorithm and architecture design perspective. Coverage also includes computing platforms for different wireless technologies and standards, including MIMO, OFDM, Massive MIMO, DVB, WLAN, LTE/LTE-A, and 5G.

Dalla quarta di copertina

This book focuses on domain-specific heterogeneous reconfigurable architectures, demonstrating for readers a computing platform which is flexible enough to support multiple standards, multiple modes, and multiple algorithms. The content is multi-disciplinary, covering areas of wireless communication, computing architecture, and circuit design. The platform described provides real-time processing capability with reasonable implementation cost, achieving balanced trade-offs among flexibility, performance, and hardware costs. The authors discuss efficient design methods for wireless communication processing platforms, from both an algorithm and architecture design perspective. Coverage also includes computing platforms for different wireless technologies and standards, including MIMO, OFDM, Massive MIMO, DVB, WLAN, LTE/LTE-A, and 5G.

Discusses reconfigurable architectures, including hardware building blocks such as processing elements, memory sub-systems, Network-on-Chip (NoC), and dynamic hardware reconfiguration;

Describes a unique design and optimization methodology, applied to different areas and levels, including communication theory, hardware implementation, and software support;

Demonstrates design trade-offs during different development phases and enables readers to apply similar techniques to various applications.