High-Level Power Analysis and Optimization

Raghunathan, Anand; Jha, Niraj K.; Dey, Sujit

ISBN 10: 0792380738 / ISBN 13: 9780792380733

Editore: Kluwer Academic Publishers, Boston, 1998

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Hardcover. No jacket. A few marks on boards. Leading corners are slightly worn. Minor dent on upper edge of rear board. Spine ends are a little bumped. Previous owner's name penned on FEP. Binding is tight, contents are clean and clear throughout. AM. Codice articolo 247850

Dati bibliografici

Titolo: High-Level Power Analysis and Optimization

Casa editrice: Kluwer Academic Publishers, Boston

Data di pubblicazione: 1998

Legatura: Hardcover

Condizione: Very Good

Condizione sovraccoperta: No Dust Jacket

Tipologia articolo: Used

Descrizione articolo

Riassunto:

High-Level Power Analysis and Optimization presents a comprehensive description of power analysis and optimization techniques at the higher (architecture and behavior) levels of the design hierarchy, which are often the levels that yield the most power savings. This book describes power estimation and optimization techniques for use during high-level (behavioral synthesis), as well as for designs expressed at the register-transfer or architecture level.
High-Level Power Analysis and Optimization surveys the state-of-the-art research on the following topics: power estimation/macromodeling techniques for architecture-level designs, high-level power management techniques, and high-level synthesis optimizations for low power.
High-Level Power Analysis and Optimization will be very useful reading for students, researchers, designers, design methodology developers, and EDA tool developers who are interested in low-power VLSI design or high-level design methodologies.

Contenuti:

List of Figures. List of Tables. Preface. 1. Introduction. 2. Background. 3. Architecture-Level Power Estimation. 4. Power Management. 5. High-Level Synthesis for Low Power. 6. Conclusions and Future Work. References. Index.