High-Level Verification: Methods and Tools for Verification of System-Level Designs

Lingua: inglese

Editore: SPRINGER NATURE Mai 2011, 2011

1441993584 / 9781441993588

Da: BuchWeltWeit Ludwig Meier e.K., Bergisch Gladbach, GermaniaBuchWeltWeit Ludwig Meier e.K.

Venditore con 5 stelle

Venditore AbeBooks dal 11 gennaio 2012

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Descrizione dell’articolo da parte del venditore

This item is printed on demand - it takes 3-4 days longer - Neuware -Given the growing size and heterogeneity of Systems on Chip (SOC), the design process from initial specification to chip fabrication has become increasingly complex. This growing complexity provides incentive for designers to use high-level languages such as C, SystemC, and SystemVerilog for system-level design. While a major goal of these high-level languages is to enable verification at a higher level of abstraction, allowing early exploration of system-level designs, the focus so far for validation purposes has been on traditional testing techniques such as random testing and scenario-based testing. This book focuses on high-level verification, presenting a design methodology that relies upon advances in synthesis techniques as well as on incremental refinement of the design process. These refinements can be done manually or through elaboration tools. This book discusses verification of specific properties in designs written using high-level languages, as well as checking that the refined implementations are equivalent to their high-level specifications. The novelty of each of these techniques is that they use a combination of formal techniques to do scalable verification of system designs completely automatically. The verification techniques presented in this book include methods for verifying properties of high-level designs and methods for verifying that the translation from high-level design to a low-level Register Transfer Language (RTL) design preserves semantics. Used together, these techniques guarantee that properties verified in the high-level design are preserved through the translation to low-level RTL. 167 pp. Englisch.…

Codice articolo 9781441993588

Titolo
High-Level Verification: Methods and Tools for Verification of System-Level Designs
Autore
Sudipta Kundu
Editore
SPRINGER NATURE Mai 2011
Anno di pubblicazione
2011
Condizione
Neu
Rilegatura
Buch
Lingua
inglese
ISBN 10
1441993584
ISBN 13
9781441993588
Peso dell'articolo
419 grammi
Dimensioni
245x164x18 mm

BuchWeltWeit Ludwig Meier e.K.

Bergisch Gladbach, Germania

Venditore con 5 stelle

Venditore AbeBooks dal 11 gennaio 2012

Tariffe di spedizione da Germania a U.S.A.

ArticoloDa 5 a 15 giorni lavorativiDa 5 a 15 giorni lavorativi
Primo articoloEUR 23,00EUR 23,00
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BuchWeltWeit Ludwig Meier e.K.

Germania