High Performance Multi-Channel High-Speed I/O Circuits

Ramesh Harjani

ISBN 10: 1461449626 / ISBN 13: 9781461449621

Editore: Springer New York, Springer US, 2013

Riguardo questo articolo

Druck auf Anfrage Neuware - Printed after ordering - This book describes design techniques that can be used to mitigate crosstalk in high-speed I/O circuits. The focus of the book is in developing compact and low power integrated circuits for crosstalk cancellation, inter-symbol interference (ISI) mitigation and improved bit error rates (BER) at higher speeds. This book is one of the first to discuss in detail the problem of crosstalk and ISI mitigation encountered as data rates have continued beyond 10Gb/s. Readers will learn to avoid the data performance cliff, with circuits and design techniques described for novel, low power crosstalk cancellation methods that are easily combined with current ISI mitigation architectures.

Codice articolo 9781461449621

Dati bibliografici

• Titolo: High Performance Multi-Channel High-Speed I/O Circuits
• Editore: Springer New York, Springer US
• Data di pubblicazione: 2013
• Lingua: Inglese
• ISBN 10: 1461449626
• ISBN 13: 9781461449621
• Rilegatura: Buch
• Condizione: Neu
• Dimensioni: 241 L x 160 A x 11 P (millimetri) 241 millimetri di larghezza per 160 millimetri di altezza per 11 millimetri di profondità
• Peso: 325 grammi

Descrizione articolo

Riassunto

This book describes design techniques that can be used to mitigate crosstalk in high-speed I/O circuits. The focus of the book is in developing compact and low power integrated circuits for crosstalk cancellation, inter-symbol interference (ISI) mitigation and improved bit error rates (BER) at higher speeds. This book is one of the first to discuss in detail the problem of crosstalk and ISI mitigation encountered as data rates have continued beyond 10Gb/s. Readers will learn to avoid the data performance cliff, with circuits and design techniques described for novel, low power crosstalk cancellation methods that are easily combined with current ISI mitigation architectures.

Dalla quarta di copertina

This book describes design techniques that can be used to mitigate crosstalk in high-speed I/O circuits. The focus of the book is in developing compact and low power integrated circuits for crosstalk cancellation, inter-symbol interference (ISI) mitigation and improved bit error rates (BER) at higher speeds. This book is one of the first to discuss in detail the problem of crosstalk and ISI mitigation encountered as data rates have continued beyond 10Gb/s. Readers will learn to avoid the data performance cliff, with circuits and design techniques described for novel, low power crosstalk cancellation methods that are easily combined with current ISI mitigation architectures.

· Describes technology and design ideas for power-efficient crosstalk cancellation in multi-channel high-speed I/O circuits;

· Includes critical background knowledge related to channel ISI equalization circuits;

· Provides crosstalk cancellation circuit methods that can be adapted efficiently to currently used equalization circuits in high-speed I/O receivers; key crosstalk cancellation blocks can be merged easily with automatic gain control (AGC) circuits in current I/O systems.