Low Power Embedded Systems : Intelligent Memory Management Systems for Low Power Embedded Systems- Caches, TLBs, Flash Memories

Jung-Hoon Lee

ISBN 10: 3639006097 / ISBN 13: 9783639006094

Editore: VDM Verlag Dr. Müller E.K., 2008

Riguardo questo articolo

nach der Bestellung gedruckt Neuware - Printed after ordering - As the demand for multimedia applications has increased, embedded processor designs have evolved to provide high performance on media processing algorithms, such as image processing, video compression and decompression, voice processing, wireless communication, and so on. Cache memory and TLB memory systems are a key mechanism for improving overall system performance and low power consumption. A cache exploits the locality inherent in the reference stream of a typical application. Two primary types of locality are available, and the degree to which they can be exploited depends on program execution characteristics. The translation look-aside buffer (TLB) is an on-chip memory structure that caches only page table entries for recently used virtual to physical address translations. If the necessary translation information exists in the TLB, the system can translate an address without accessing the page table. Flash memory is non-volatile and can retain data even after system is powered off. Besides, it has many other features such as fast access speed, low power consumption, attractive shock resistance, small size, and lightweight.

Codice articolo 9783639006094

Dati bibliografici

• Titolo: Low Power Embedded Systems : Intelligent Memory Management Systems for Low Power Embedded Systems- Caches, TLBs, Flash Memories
• Editore: VDM Verlag Dr. Müller E.K.
• Data di pubblicazione: 2008
• Lingua: Inglese
• ISBN 10: 3639006097
• ISBN 13: 9783639006094
• Rilegatura: Taschenbuch
• Condizione: Neu
• Dimensioni: 220 L x 150 A x 9 P (millimetri) 220 millimetri di larghezza per 150 millimetri di altezza per 9 millimetri di profondità
• Peso: 209 grammi

Descrizione articolo

Riassunto

As the demand for multimedia applications has increased, embedded processor designs have evolved to provide high performance on media processing algorithms, such as image processing, video compression and decompression, voice processing, wireless communication, and so on. Cache memory and TLB memory systems are a key mechanism for improving overall system performance and low power consumption. A cache exploits the locality inherent in the reference stream of a typical application. Two primary types of locality are available, and the degree to which they can be exploited depends on program execution characteristics. The translation look-aside buffer (TLB) is an on-chip memory structure that caches only page table entries for recently used virtual to physical address translations. If the necessary translation information exists in the TLB, the system can translate an address without accessing the page table. Flash memory is non-volatile and can retain data even after system is powered off. Besides, it has many other features such as fast access speed, low power consumption, attractive shock resistance, small size, and lightweight.

L'autore

He received the Ph.D degree from Yonsei Univ. in 2004. He is currently a professor in GyeongSang Natl. Univ. Korea. His research interests include advanced computer architectures, embedded systems, memory systems, and low power computing. He was published in three major biographical dictionaries, ABI, IBC and Marquis Who's Who in 2007.