Low-Voltage CMOS Log Companding Analog Design

Francisco Serra-Graells|Adoración Rueda|José L. Huertas

ISBN 10: 140207445X / ISBN 13: 9781402074455

Editore: Springer US, 2003

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Dieser Artikel ist ein Print on Demand Artikel und wird nach Ihrer Bestellung fuer Sie gedruckt. Low-Voltage CMOS Log Companding Analog Design presents in detail state-of-the-art analog circuit techniques for the very low-voltage and low-power design of systems-on-chip in CMOS technologies. The proposed strategy is mainly based on two bases.

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Dati bibliografici

• Titolo: Low-Voltage CMOS Log Companding Analog Design
• Editore: Springer US
• Data di pubblicazione: 2003
• Lingua: Inglese
• ISBN 10: 140207445X
• ISBN 13: 9781402074455
• Rilegatura: Gebunden
• Condizione: New

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Riassunto

Low-Voltage CMOS Log Companding Analog Design presents in detail state-of-the-art analog circuit techniques for the very low-voltage and low-power design of systems-on-chip in CMOS technologies. The proposed strategy is mainly based on two bases: the Instantaneous Log Companding Theory, and the MOSFET operating in the subthreshold region. The former allows inner compression of the voltage dynamic-range for very low-voltage operation, while the latter is compatible with CMOS technologies and suitable for low-power circuits. The required background on the specific modeling of the MOS transistor for Companding is supplied at the beginning. Following this general approach, a complete set of CMOS basic building blocks is proposed and analyzed for a wide variety of analog signal processing. In particular, the covered areas include: amplification and AGC, arbitrary filtering, PTAT generation, and pulse duration modulation (PDM). For each topic, several case studies are considered to illustrate the design methodology. Also, integrated examples in 1.2um and 0.35um CMOS technologies are reported to verify the good agreement between design equations and experimental data. The resulting analog circuit topologies exhibit very low-voltage (i.e. 1V) and low-power (few tenths of uA) capabilities. Apart from these specific design examples, a real industrial application in the field of hearing aids is also presented as the main demonstrator of all the proposed basic building blocks. This system-on-chip exhibits true 1V operation, high flexibility through digital programmability and very low-power consumption (about 300uA including the Class-D amplifier). As a result, the reported ASIC can meet the specifications of a complete family of common hearing aid models. In conclusion, this book is addressed to both industry ASIC designers who can apply its contents to the synthesis of very low-power systems-on-chip in standard CMOS technologies, as well as to the teachers of modern circuit design in electronic engineering.

Recensione

From the reviews:

"Without question this is an important book. It formulates and analyzes concepts and principles that may significantly influence the next trend in development of low-voltage low-power mixed-signal SoC designs. This book is very timely and well written. ... I think that the book is a fine contribution to the ... texts in this field, and will represent a welcome addition to the library literature on this topic. I will certainly hold this book in my library and recommend to anyone working in this area." (Mile Stojcev, Microelectronics Reliability, Vol. 44, 2004)

"The book explains low-voltage CMOS log companding design ... . It does explain the building blocks for companding design and thoroughly explains each building block. ... The book really explains the design well ... it is recommended for graduate students ... ." (IEEE Circuits & Devices Magazine, Vol. 21 (6), 2005)