MIPS RISC Architecture

Kane, Gerry; Heinrich, Joseph

ISBN 10: 0135904722 / ISBN 13: 9780135904725

Editore: Prentice Hall, 1991

May have limited writing in cover pages. Pages are unmarked. ~ ThriftBooks: Read More, Spend Less. Codice articolo G0135904722I4N00

Riassunto:

A complete reference manual to the MIPS RISC architecture, this book describes the user Instruction Set Architecture (ISA), by the R2000, R3000, R4000, and R6000 (collectively known as the R-Series) processors, together with an extension to this ISA. Focusing on the new R4000 and R6000 chips, this book is organized into two major sections: Chapters 1 through 6 describe the characteristics of the CPU, while Chapter 7 through 9 describe the Floating Point Unit (FPU). This book describes the general characteristics and capabilities of each RISC processor, along with a description of the programming model, memory management unit (MMU), and the registers associated with each processor. Also included is an overview of the underlying concepts that distinguish RISC architecture from Complex Instruction Set Computer (CISC) architecture.

Product Description:

Titolo: MIPS RISC Architecture
Autore/i: Joseph Heinrich et Gerry Kane
Editore: Prentice Hall
Anno di pubblicazione: 1991
Stato: Seconda mano - Buone condizioni
ISBN : 9780135904725
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Dati bibliografici

Titolo: MIPS RISC Architecture
Casa editrice: Prentice Hall
Data di pubblicazione: 1991
Legatura: Paperback
Condizione: Very Good
Condizione sovraccoperta: No Jacket
Edizione: seconda edizione