Machine Learning Techniques for VLSI Chip Design (Hardcover)

Abhishek Kumar

ISBN 10: 1119910390 / ISBN 13: 9781119910398

Editore: John Wiley & Sons Inc, New York, 2023

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Hardcover. MACHINE LEARNING TECHNIQUES FOR VLSI CHIP DESIGN This cutting-edge new volume covers the hardware architecture implementation, the software implementation approach, the efficient hardware of machine learning applications with FPGA or CMOS circuits, and many other aspects and applications of machine learning techniques for VLSI chip design. Artificial intelligence (AI) and machine learning (ML) have, or will have, an impact on almost every aspect of our lives and every device that we own. AI has benefitted every industry in terms of computational speeds, accurate decision prediction, efficient machine learning (ML), and deep learning (DL) algorithms. The VLSI industry uses the electronic design automation tool (EDA), and the integration with ML helps in reducing design time and cost of production. Finding defects, bugs, and hardware Trojans in the design with ML or DL can save losses during production. Constraints to ML-DL arise when having to deal with a large set of training datasets. This book covers the learning algorithm for floor planning, routing, mask fabrication, and implementation of the computational architecture for ML-DL. The future aspect of the ML-DL algorithm is to be available in the format of an integrated circuit (IC). A user can upgrade to the new algorithm by replacing an IC. This new book mainly deals with the adaption of computation blocks like hardware accelerators and novel nano-material for them based upon their application and to create a smart solution. This exciting new volume is an invaluable reference for beginners as well as engineers, scientists, researchers, and other professionals working in the area of VLSI architecture development. Shipping may be from our UK warehouse or from our Australian or US warehouses, depending on stock availability.

Codice articolo 9781119910398

Dati bibliografici

• Titolo: Machine Learning Techniques for VLSI Chip Design (Hardcover)
• Editore: John Wiley & Sons Inc, New York
• Data di pubblicazione: 2023
• Lingua: Inglese
• ISBN 10: 1119910390
• ISBN 13: 9781119910398
• Rilegatura: Hardcover
• Condizione: new

Descrizione articolo

Riassunto

MACHINE LEARNING TECHNIQUES FOR VLSI CHIP DESIGN

This cutting-edge new volume covers the hardware architecture implementation, the software implementation approach, the efficient hardware of machine learning applications with FPGA or CMOS circuits, and many other aspects and applications of machine learning techniques for VLSI chip design.

Artificial intelligence (AI) and machine learning (ML) have, or will have, an impact on almost every aspect of our lives and every device that we own. AI has benefitted every industry in terms of computational speeds, accurate decision prediction, efficient machine learning (ML), and deep learning (DL) algorithms. The VLSI industry uses the electronic design automation tool (EDA), and the integration with ML helps in reducing design time and cost of production. Finding defects, bugs, and hardware Trojans in the design with ML or DL can save losses during production. Constraints to ML-DL arise when having to deal with a large set of training datasets. This book covers the learning algorithm for floor planning, routing, mask fabrication, and implementation of the computational architecture for ML-DL.

The future aspect of the ML-DL algorithm is to be available in the format of an integrated circuit (IC). A user can upgrade to the new algorithm by replacing an IC. This new book mainly deals with the adaption of computation blocks like hardware accelerators and novel nano-material for them based upon their application and to create a smart solution. This exciting new volume is an invaluable reference for beginners as well as engineers, scientists, researchers, and other professionals working in the area of VLSI architecture development.

Informazioni sull?autore

Abhishek Kumar, PhD, is an associate professor at and obtained his PhD in the area of VLSI design for low power and secured architecture from Lovely Professional University, India. With over 11 years of academic experience, he has published more than 30 research papers and proceedings in scholarly journals. He has also published nine book chapters and one authored book. He has worked as a reviewer and program committee member and editorial board member for academic and scholarly conferences and journals, and he has 11 patents to his credit.

Suman Lata Tripathi, PhD, is a professor at Lovely Professional University with more than 21 years of experience in academics. She has published more than 103 research papers in refereed journals and conferences. She has organized several workshops, summer internships, and expert lectures for students, and she has worked as a session chair, conference steering committee member, editorial board member, and reviewer for IEEE journals and conferences. She has published three books and currently has multiple volumes scheduled for publication from Wiley-Scrivener.

K. Srinivasa Rao, PhD, is a professor and Head of Microelectronics Research Group, Department of Electronics and Communication Engineering at the Koneru Lakshmaiah Education Foundation, India. He has earned multiple awards for his scholarship and has published more than 150 papers in scientific journals and presented more than 55 papers at scientific conferences around the world.