Manufacturing yield evaluation of VLSI/WSI systems

[edited by] Bruno Ciciani

ISBN 10: 0818662921 / ISBN 13: 9780818662928

Editore: IEEE Computer Society Press c1995., Los Alamitos, Calif., 1995

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Cover has crease, marks, a few pages have torn corners. Codice articolo 3404

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Titolo: Manufacturing yield evaluation of VLSI/WSI ...

Casa editrice: IEEE Computer Society Press c1995., Los Alamitos, Calif.

Data di pubblicazione: 1995

Legatura: Softcover

Condizione: Good

Condizione sovraccoperta: No Dust Jacket

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Riassunto:

Low manufacturing yield and dependability (reliability, availability, and performability) are problems of increasing importance as the densities of integrated circuits increase. This book furnishes you with engineering methodologies so that you can evaluate the cost-benefit ratio of fault-tolerant mechanisms used in VLSI/WSI systems. It focuses in particular on manufacturing fault analysis and yield evaluation. A practical understanding of these concepts and their application can help to reduce the chance of having device failures.
This book is divided into five chapters. The first chapter introduces and presents an overview of yield enhancement techniques, manufacturing defect and fault modeling, yield evaluation methodologies, and cost-benefit ratio evaluation methodologies of fault-tolerant mechanisms. Each of the other four chapters contains a collection of papers covering these four research areas. These chapters begin with an introduction to the papers, present abstracts, and provide further references for a complete study of the reprinted papers that follow.