Modeling, Analysis and Optimization of Network-on-Chip Communication Architectures

Umit Y. Ogras

ISBN 10: 9400739575 / ISBN 13: 9789400739574

Editore: Springer, Springer Mär 2013, 2013

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This item is printed on demand - Print on Demand Titel. Neuware -Traditionally, design space exploration for Systems-on-Chip (SoCs) has focused on the computational aspects of the problem at hand. However, as the number of components on a single chip and their performance continue to increase, the communication architecture plays a major role in the area, performance and energy consumption of the overall system. As a result, a shift from computation-based to communication-based design becomes mandatory. Towards this end, network-on-chip (NoC) communication architectures have emerged recently as a promising alternative to classical bus and point-to-point communication architectures.In this dissertation, we study outstanding research problems related to modeling, analysis and optimization of NoC communication architectures. More precisely, we present novel design methodologies, software tools and FPGA prototypes to aid the design of application-specific NoCs.Springer-Verlag KG, Sachsenplatz 4-6, 1201 Wien 188 pp. Englisch.

Codice articolo 9789400739574

Dati bibliografici

• Titolo: Modeling, Analysis and Optimization of Network-on-Chip Communication Architectures
• Editore: Springer, Springer Mär 2013
• Data di pubblicazione: 2013
• Lingua: Inglese
• ISBN 10: 9400739575
• ISBN 13: 9789400739574
• Rilegatura: Buch
• Condizione: Neu
• Dimensioni: 241 L x 160 A x 14 P (millimetri) 241 millimetri di larghezza per 160 millimetri di altezza per 14 millimetri di profondità
• Peso: 453 grammi

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Riassunto

Traditionally, design space exploration for Systems-on-Chip (SoCs) has focused on the computational aspects of the problem at hand. However, as the number of components on a single chip and their performance continue to increase, the communication architecture plays a major role in the area, performance and energy consumption of the overall system. As a result, a shift from computation-based to communication-based design becomes mandatory. Towards this end, network-on-chip (NoC) communication architectures have emerged recently as a promising alternative to classical bus and point-to-point communication architectures.

In this dissertation, we study outstanding research problems related to modeling, analysis and optimization of NoC communication architectures. More precisely, we present novel design methodologies, software tools and FPGA prototypes to aid the design of application-specific NoCs.

Dalla quarta di copertina

Traditionally, design space exploration for Systems-on-Chip (SoCs) has focused on the computational aspects of the problem at hand. However, as the number of components on a single chip and their performance continue to increase, the communication architecture plays a major role in the area, performance and energy consumption of the overall system. As a result, a shift from computation-based to communication-based design becomes mandatory. Towards this end, network-on-chip (NoC) communication architectures have emerged recently as a promising alternative to classical bus and point-to-point communication architectures.

This book explores outstanding research problems related to modeling, analysis and optimization of NoC communication architectures. More precisely, we present novel design methodologies, software tools and FPGA prototypes to aid the design of application-specific NoCs.