On-Chip Training NPU - Algorithm, Architecture and SoC Design. Questo articolo non è disponibile.On-Chip Training NPU - Algorithm, Architecture and SoC Design

Unlike most available sources that focus on deep neural network (DNN) inference, this book provides readers with a single-source reference on the needs, requirements, and challenges involved with on-device, DNN training semiconductor and SoC design. The authors include coverage of the trends and history surrounding the development of on-device DNN training, as well as on-device training semiconductors and SoC design examples to facilitate understanding.