Performance Analysis of Different CMOS Based DRAM Cell Structures: DRAM Cell Structure

Asthana, Prateek; Kumar, Akhilesh; Poddar, Arunava

ISBN 10: 6203930156 / ISBN 13: 9786203930153

Editore: LAP LAMBERT Academic Publishing, 2021

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Codice articolo 18395831894

Dati bibliografici

• Titolo: Performance Analysis of Different CMOS Based DRAM Cell Structures: DRAM Cell Structure
• Editore: LAP LAMBERT Academic Publishing
• Data di pubblicazione: 2021
• Lingua: Inglese
• ISBN 10: 6203930156
• ISBN 13: 9786203930153
• Rilegatura: Brossura
• Condizione: New

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Riassunto

Dynamic Random Access Memories (DRAMs) are widely used in all kinds of electronic devices due to their low cost and fast operating speed. Besides its extensive applications, mass production of DRAMs usually marks the maturity of the corresponding semiconductor technology that is continuously driven to smaller dimensions and high yield by market requirements and competitions. In general, mass production of a novel DRAM generation is usually regarded as the milestone of a new semiconductor technology era. As the term 'DRAM' implies, it is a kind of volatile memory, i.e. the data stored has to be 'dynamically' refreshed to guarantee correct memory function; each bit in the DRAM can be accessed 'randomly' in comparison with a conventional tape recorder.