Reconfigurable Networks-on-Chip

Sao-Jie Chen

ISBN 10: 1441993401 / ISBN 13: 9781441993403

Editore: Springer New York, Springer New York, 2011

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Druck auf Anfrage Neuware - Printed after ordering - This book provides a comprehensive survey of recent progress in the design and implementation of Networks-on-Chip. It addresses a wide spectrum of on-chip communication problems, ranging from physical, network, to application layers. Specific topics that are explored in detail include packet routing, resource arbitration, error control/correction, application mapping, and communication scheduling. Additionally, a novel bi-directional communication channel NoC (BiNoC) architecture is described, with detailed explanation. Written for practicing engineers in need of practical knowledge about the design and implementation of networks-on-chip; Includes tutorial-like details to introduce readers to a diverse range of NoC designs, as well as in-depth analysis for designers with NoC experience to explore advanced issues; Describes a variety of on-chip communication architectures, including a novel bi-directional communication channel NoC. From the Foreword:Overall this book shows important advances over the state of the art that will affect future system design as well as R&D in tools and methods for NoC design. It represents an important reference point for both designers and electronic design automation researchers and developers.--Giovanni De Micheli.

Codice articolo 9781441993403

Dati bibliografici

• Titolo: Reconfigurable Networks-on-Chip
• Editore: Springer New York, Springer New York
• Data di pubblicazione: 2011
• Lingua: Inglese
• ISBN 10: 1441993401
• ISBN 13: 9781441993403
• Rilegatura: Buch
• Condizione: Neu
• Dimensioni: 241 L x 160 A x 17 P (millimetri) 241 millimetri di larghezza per 160 millimetri di altezza per 17 millimetri di profondità
• Peso: 500 grammi

Descrizione articolo

Riassunto

This book provides a comprehensive survey of recent progress in the design and implementation of Networks-on-Chip. It addresses a wide spectrum of on-chip communication problems, ranging from physical, network, to application layers. Specific topics that are explored in detail include packet routing, resource arbitration, error control/correction, application mapping, and communication scheduling. Additionally, a novel bi-directional communication channel NoC (BiNoC) architecture is described, with detailed explanation.

• Written for practicing engineers in need of practical knowledge about the design and implementation of networks-on-chip;
• Includes tutorial-like details to introduce readers to a diverse range of NoC designs, as well as in-depth analysis for designers with NoC experience to explore advanced issues;
• Describes a variety of on-chip communication architectures, including a novel bi-directional communication channel NoC.

From the Foreword:

Overall this book shows important advances over the state of the art that will affect future system design as well as R&D in tools and methods for NoC design. It represents an important reference point for both designers and electronic design automation researchers and developers.

--Giovanni De Micheli