Reconfigurable Networks-on-chip

Chen, Sao-Jie; Lan, Ying-Cherng; Tsai, Wen-Chung; Hu, Yu Hen

ISBN 10: 1441993401 / ISBN 13: 9781441993403

Editore: Springer-Verlag New York Inc., 2011

Providing a comprehensive survey of recent progress in the design and implementation of Networks-on-Chip (NoC), this book addresses a wide spectrum of on-chip communication problems. It offers practical knowledge about the design and implementation of NoC. Num Pages: 206 pages, 23 black & white tables, biography. BIC Classification: TJFC; UYF. Category: (P) Professional & Vocational. Dimension: 242 x 167 x 19. Weight in Grams: 462. . 2011. 2012th Edition. hardcover. . . . . Codice articolo V9781441993403

Riassunto:

This book provides a comprehensive survey of recent progress in the design and implementation of Networks-on-Chip. It addresses a wide spectrum of on-chip communication problems, ranging from physical, network, to application layers. Specific topics that are explored in detail include packet routing, resource arbitration, error control/correction, application mapping, and communication scheduling. Additionally, a novel bi-directional communication channel NoC (BiNoC) architecture is described, with detailed explanation.

• Written for practicing engineers in need of practical knowledge about the design and implementation of networks-on-chip;
• Includes tutorial-like details to introduce readers to a diverse range of NoC designs, as well as in-depth analysis for designers with NoC experience to explore advanced issues;
• Describes a variety of on-chip communication architectures, including a novel bi-directional communication channel NoC.

From the Foreword:

Overall this book shows important advances over the state of the art that will affect future system design as well as R&D in tools and methods for NoC design. It represents an important reference point for both designers and electronic design automation researchers and developers.

--Giovanni De Micheli

Dalla quarta di copertina:

This book provides a comprehensive survey of recent progress in the design and implementation of Networks-on-Chip. It addresses a wide spectrum of on-chip communication problems, ranging from physical, network, to application layers. Specific topics that are explored in detail include packet routing, resource arbitration, error control/correction, application mapping, and communication scheduling. Additionally, a novel bi-directional communication channel NoC (BiNoC) architecture is described, with detailed explanation.

• Written for practicing engineers in need of practical knowledge about the design and implementation of networks-on-chip;
• Includes tutorial-like details to introduce readers to a diverse range of NoC designs, as well as in-depth analysis for designers with NoC experience to explore advanced issues;
• Describes a variety of on-chip communication architectures, including a novel bi-directional communication channel NoC.

From the Foreword:

Overall this book shows important advances over the state of the art that will affect future system design as well as R&D in tools and methods for NoC design. It represents an important reference point for both designers and electronic design automation researchers and developers.

--Giovanni De Micheli

Dati bibliografici

Titolo: Reconfigurable Networks-on-chip
Casa editrice: Springer-Verlag New York Inc.
Data di pubblicazione: 2011
Legatura: Rilegato
Condizione: New