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With dramatic increases in on-chip packing densities, routing congestion has become a major problem in integrated circuit design, impacting convergence, performance, and yield, and complicating the synthesis of critical interc- nects.
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With the dramatic increases in on-chip packing densities, routing congestion has become a major problem in chip design. The problem is especially acute as interconnects are also the performance bottleneck in integrated circuits. The solution lies in judicious resource management. This involves intelligent allocation of the available interconnect resources, up-front planning of the wire routes for even wire distributions, and transformations that make the physical synthesis flow congestion-aware.
Routing Congestion in VLSI Circuits: Estimation and Optimization provides the reader with a complete understanding of the root causes of routing congestion in present-day and future VLSI circuits, available techniques for estimating and optimizing this congestion, and a critical analysis of the accuracy and effectiveness of these techniques, so that the reader may prudently choose an approach that is appropriate to their design goals. The scope of the work includes metrics and optimization techniques for routing congestion at various stages of the VLSI design flow, including the architectural level, the logic synthesis/technology mapping level, the placement phase, and the routing step. A particular focus of this work is on the congestion issues that deal primarily with standard cell based design.
Routing Congestion in VLSI Circuits: Estimation and Optimization is a valuable reference for CAD developers and researchers, design methodology engineers, VLSI design and CAD students, and VLSI design engineers.
Titolo: Routing Congestion In Vlsi Circuits: ...
Casa editrice: Springer
Data di pubblicazione: 2007
Legatura: Rilegato
Condizione: New
Da: Buchpark, Trebbin, Germania
Condizione: Sehr gut. Zustand: Sehr gut | Sprache: Englisch | Produktart: Bücher | With the dramatic increases in on-chip packing densities, routing congestion has become a major problem in chip design. The problem is especially acute as interconnects are also the performance bottleneck in integrated circuits. The solution lies in judicious resource management. This involves intelligent allocation of the available interconnect resources, up-front planning of the wire routes for even wire distributions, and transformations that make the physical synthesis flow congestion-aware. Routing Congestion in VLSI Circuits: Estimation and Optimization provides the reader with a complete understanding of the root causes of routing congestion in present-day and future VLSI circuits, available techniques for estimating and optimizing this congestion, and a critical analysis of the accuracy and effectiveness of these techniques, so that the reader may prudently choose an approach that is appropriate to their design goals. The scope of the work includes metrics and optimization techniques for routing congestion at various stages of the VLSI design flow, including the architectural level, the logic synthesis/technology mapping level, the placement phase, and the routing step. A particular focus of this work is on the congestion issues that deal primarily with standard cell based design. Routing Congestion in VLSI Circuits: Estimation and Optimization is a valuable reference for CAD developers and researchers, design methodology engineers, VLSI design and CAD students, and VLSI design engineers. Codice articolo 2975617/12
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Condizione: New. Brand New ! Fast Delivery "International Edition " and ship within 24-48 hours. Deliver by FedEx and Dhl, & Aramex, UPS, & USPS and we do accept APO and PO BOX Addresses. Order can be delivered worldwide within 4-6 Working days .and we do have flat rate for up to 2LB. Extra shipping charges will be requested This Item May be shipped from India, United states & United Kingdom. Depending on your location and availability. Codice articolo CVS 9780387300375
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hardcover. Condizione: New. In shrink wrap. Looks like an interesting title! Codice articolo Q-0387300376
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Gebunden. Condizione: New. Dieser Artikel ist ein Print on Demand Artikel und wird nach Ihrer Bestellung fuer Sie gedruckt. Provides an in-depth treatment of routing congestion in VLSI circuitsComprehensively surveys the work done and points to challenges for the futureEquips readers with the knowledge to prudently choose an approach that is appropriate to their. Codice articolo 5909831
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